Konstantin Zhuravlyov 4451e0b882 [AMDGPU] Sign extend AShr when promoting (instead of zero extending) ... llvm-svn: 283130		2016-10-03 18:29:01 +00:00
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AArch64
AMDGPU	[AMDGPU] Sign extend AShr when promoting (instead of zero extending)	2016-10-03 18:29:01 +00:00
ARM	[ARM] Code size optimisation to lower udiv+urem to udiv+mls instead of a	2016-10-03 10:12:32 +00:00
BPF
Generic
Hexagon
Inputs
Lanai
Mips
MIR
MSP430
NVPTX
PowerPC	[PowerPC] Refactor soft-float support, and enable PPC64 soft float	2016-10-02 02:10:20 +00:00
SPARC
SystemZ
Thumb
Thumb2
WebAssembly	[WebAssembly] Make register stackification more conservative	2016-09-30 18:02:54 +00:00
WinEH
X86	[x86, SSE/AVX] allow 128/256-bit lowering for copysign vector intrinsics (PR30433)	2016-10-03 16:38:27 +00:00
XCore