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24141f1c96
Summary: Since we are planning to add ADDIStocHA for 32bit in later patch, we decided to change 64bit one first to follow naming convention with 8 behind opcode. Patch by: Xiangling_L Differential Revision: https://reviews.llvm.org/D64814 llvm-svn: 366731
93 lines
3.0 KiB
YAML
93 lines
3.0 KiB
YAML
# RUN: llc -mtriple powerpc64-unknown-linux-gnu -run-pass livevars -run-pass phi-node-elimination -verify-machineinstrs -o - %s | FileCheck %s
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# This test case was originally known as
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# test/CodeGen/PowerPC/2013-07-01-PHIElimBug.ll
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#
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# It was discovered that the original test case no longer reproduced the bug
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# from PR16508 (solved in rL185363). That could have been resolved by adding
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# -O1 (or possibly -O0) to the run line, but instead the test case was
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# converted into this .mir test case. Having it as a .mir test should make it
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# less sensitive to changes in earlier passes.
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--- |
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target datalayout = "E-m:e-i64:64-n32:64"
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target triple = "powerpc64-unknown-linux-gnu"
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@g_51 = external global [8 x i32], align 4
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define void @func_7() {
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bb.0:
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ret void
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}
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...
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---
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name: func_7
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tracksRegLiveness: true
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body: |
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bb.0:
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liveins: $x2
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%0:g8rc_and_g8rc_nox0 = ADDIStocHA8 $x2, @g_51
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%1:g8rc_and_g8rc_nox0 = LDtocL @g_51, killed %0, implicit $x2 :: (load 8)
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%2:gprc = LI 0
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%3:crrc = CMPLWI killed %2, 0
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BCC 76, killed %3, %bb.2
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bb.1:
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%4:g8rc = ADDI8 killed %1, 24
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B %bb.4
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bb.2:
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%5:g8rc = ADDI8 killed %1, 24
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%6:g8rc = LI8 0
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%7:crrc = CMPLWI undef %8:gprc, 20
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bb.3:
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%9:g8rc = PHI %5, %bb.2, %10, %bb.3
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%10:g8rc = PHI %6, %bb.2, undef %11:g8rc, %bb.3
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BCC 68, %7, %bb.3
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B %bb.4
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bb.4:
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%12:g8rc_and_g8rc_nox0 = PHI %4, %bb.1, %9, %bb.3
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%13:g8rc = LI8 0
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STW8 killed %13, 0, killed %12 :: (store 4)
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BLR8 implicit $lr8, implicit $rm
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...
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# Original TR (and 2013-07-01-PHIElimBug.ll) was about verifier errors for bb.3.
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#
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# I got a feeling that we also need to have some checks to see that # the code
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# is correct in some way. Hopefully this test case is stable enough to verify
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# the full MIR like this.
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#
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# CHECK: bb.0:
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# CHECK: %0:g8rc_and_g8rc_nox0 = ADDIStocHA8 $x2, @g_51
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# CHECK-NEXT: %1:g8rc_and_g8rc_nox0 = LDtocL @g_51, killed %0, implicit killed $x2 :: (load 8)
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# CHECK-NEXT: %2:gprc = LI 0
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# CHECK-NEXT: %3:crrc = CMPLWI killed %2, 0
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# CHECK-NEXT: BCC 76, killed %3, %bb.2
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# CHECK: bb.1:
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# CHECK: %4:g8rc = ADDI8 killed %1, 24
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# CHECK-NEXT: %16:g8rc_and_g8rc_nox0 = COPY killed %4
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# CHECK-NEXT: B %bb.4
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# CHECK: bb.2:
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# CHECK: %5:g8rc = ADDI8 killed %1, 24
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# CHECK-NEXT: %6:g8rc = LI8 0
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# CHECK-NEXT: %7:crrc = CMPLWI undef %8:gprc, 20
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# CHECK-NEXT: %14:g8rc = COPY killed %5
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# CHECK-NEXT: %15:g8rc = COPY killed %6
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# CHECK: bb.3:
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# CHECK: %10:g8rc = COPY killed %15
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# CHECK-NEXT: %9:g8rc = COPY killed %14
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# CHECK-NEXT: %14:g8rc = COPY killed %10
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# CHECK-NEXT: %15:g8rc = IMPLICIT_DEF
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# CHECK-NEXT: %16:g8rc_and_g8rc_nox0 = COPY killed %9
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# CHECK-NEXT: BCC 68, %7, %bb.3
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# CHECK-NEXT: B %bb.4
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# CHECK: bb.4:
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# CHECK: %12:g8rc_and_g8rc_nox0 = COPY killed %16
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# CHECK-NEXT: %13:g8rc = LI8 0
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# CHECK-NEXT: STW8 killed %13, 0, killed %12 :: (store 4)
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# CHECK-NEXT: BLR8 implicit $lr8, implicit $rm
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