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f1bb8b8502
This patch is intend to implement the missing P8 MacroFusion for LLVM according to Power8 User's Manual Section 10.1.12 Instruction Fusion Differential Revision: https://reviews.llvm.org/D70651
22 lines
1.0 KiB
LLVM
22 lines
1.0 KiB
LLVM
; REQUIRES: asserts
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; RUN: llc < %s -mtriple=powerpc64le-unknown-linux-gnu -mcpu=pwr8 -verify-misched -debug-only=machine-scheduler \
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; RUN: -o - 2>&1 > /dev/null | FileCheck %s --check-prefix=CHECK-P8
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@m = local_unnamed_addr global i64 0, align 8
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define i64 @fuse_addis_ld() {
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entry:
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; CHECK-P8: ********** MI Scheduling **********
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; CHECK-P8-LABEL: fuse_addis_ld:%bb.0 entry
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; CHECK-P8: Macro fuse: SU([[SU0:[0-9]+]]) - SU([[SU1:[0-9]+]]) / ADDIStocHA8 - LD
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; CHECK-P8: SU([[SU0]]): %[[REG3:[0-9]+]]:g8rc_and_g8rc_nox0 = ADDIStocHA8 $x2, @m
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; CHECK-P8: SU([[SU1]]): %{{[0-9]+}}:g8rc = LD target-flags(ppc-toc-lo) @m, %[[REG3]]
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; CHECK-P8: ********** MI Scheduling **********
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; CHECK-P8-LABEL: fuse_addis_ld:%bb.0 entry
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; CHECK-P8: Macro fuse: SU([[SU0:[0-9]+]]) - SU([[SU1:[0-9]+]]) / ADDIStocHA8 - LD
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; CHECK-P8: SU([[SU0]]): renamable $x[[REG3:[0-9]+]] = ADDIStocHA8 $x2, @m
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; CHECK-P8: SU([[SU1]]): renamable $x[[REG3]] = LD target-flags(ppc-toc-lo) @m, renamable $x[[REG3]]
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%0 = load i64, i64* @m, align 8
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ret i64 %0
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}
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