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90e010bd3c
This patch combines some cases of ARMISD::CMOV for integers that arise in comparisons of the form a != b ? x : 0 a == b ? 0 : x and that currently (e.g. in Thumb1) are emitted as branches. Differential Revision: https://reviews.llvm.org/D34515 llvm-svn: 325323
94 lines
2.1 KiB
LLVM
94 lines
2.1 KiB
LLVM
; RUN: llc -mtriple=thumb-eabi -mcpu=arm1156t2-s -mattr=+thumb2 %s -o - | FileCheck %s
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; These tests could be improved by 'movs r0, #0' being rematerialized below the
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; test as 'mov.w r0, #0'.
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define i32 @f1(i32 %a, i32 %b) {
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%nb = sub i32 0, %b
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%tmp = icmp ne i32 %a, %nb
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%ret = select i1 %tmp, i32 42, i32 24
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ret i32 %ret
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}
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; CHECK-LABEL: f1:
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; CHECK: cmn {{.*}}, r1
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define i32 @f2(i32 %a, i32 %b) {
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%nb = sub i32 0, %b
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%tmp = icmp ne i32 %nb, %a
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%ret = select i1 %tmp, i32 42, i32 24
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ret i32 %ret
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}
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; CHECK-LABEL: f2:
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; CHECK: cmn {{.*}}, r1
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define i32 @f3(i32 %a, i32 %b) {
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%nb = sub i32 0, %b
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%tmp = icmp eq i32 %a, %nb
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%ret = select i1 %tmp, i32 42, i32 24
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ret i32 %ret
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}
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; CHECK-LABEL: f3:
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; CHECK: cmn {{.*}}, r1
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define i32 @f4(i32 %a, i32 %b) {
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%nb = sub i32 0, %b
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%tmp = icmp eq i32 %nb, %a
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%ret = select i1 %tmp, i32 42, i32 24
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ret i32 %ret
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}
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; CHECK-LABEL: f4:
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; CHECK: cmn {{.*}}, r1
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define i32 @f5(i32 %a, i32 %b) {
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%tmp = shl i32 %b, 5
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%nb = sub i32 0, %tmp
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%tmp1 = icmp eq i32 %nb, %a
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%ret = select i1 %tmp1, i32 42, i32 24
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ret i32 %ret
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}
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; CHECK-LABEL: f5:
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; CHECK: cmn.w {{.*}}, r1, lsl #5
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define i32 @f6(i32 %a, i32 %b) {
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%tmp = lshr i32 %b, 6
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%nb = sub i32 0, %tmp
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%tmp1 = icmp ne i32 %nb, %a
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%ret = select i1 %tmp1, i32 42, i32 24
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ret i32 %ret
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}
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; CHECK-LABEL: f6:
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; CHECK: cmn.w {{.*}}, r1, lsr #6
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define i32 @f7(i32 %a, i32 %b) {
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%tmp = ashr i32 %b, 7
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%nb = sub i32 0, %tmp
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%tmp1 = icmp eq i32 %a, %nb
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%ret = select i1 %tmp1, i32 42, i32 24
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ret i32 %ret
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}
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; CHECK-LABEL: f7:
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; CHECK: cmn.w {{.*}}, r1, asr #7
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define i32 @f8(i32 %a, i32 %b) {
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%l8 = shl i32 %a, 24
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%r8 = lshr i32 %a, 8
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%tmp = or i32 %l8, %r8
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%nb = sub i32 0, %tmp
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%tmp1 = icmp ne i32 %a, %nb
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%ret = select i1 %tmp1, i32 42, i32 24
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ret i32 %ret
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}
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; CHECK-LABEL: f8:
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; CHECK: cmn.w {{.*}}, {{.*}}, ror #8
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define void @f9(i32 %a, i32 %b) nounwind optsize {
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tail call void asm sideeffect "cmn.w r0, r1", ""() nounwind, !srcloc !0
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ret void
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}
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!0 = !{i32 81}
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; CHECK-LABEL: f9:
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; CHECK: cmn.w r0, r1
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