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835f91f74c
This allows us to generate better code for selecting the fixup to load. Previously when the sign was set we had to load offset 0. And when it was clear we had to load offset 4. This required a testl, setns, zero extend, and finally a mul by 4. By switching the offsets we can just shift the sign bit into the lsb and multiply it by 4.
40 lines
1.4 KiB
LLVM
40 lines
1.4 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=i686-linux-pc | FileCheck %s
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define void @test_convert_float2_ulong2(<2 x i64>* nocapture %src, <2 x float>* nocapture %dest) nounwind {
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; CHECK-LABEL: test_convert_float2_ulong2:
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; CHECK: # %bb.0:
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; CHECK-NEXT: pushl %edi
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; CHECK-NEXT: pushl %esi
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; CHECK-NEXT: subl $20, %esp
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; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax
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; CHECK-NEXT: movl {{[0-9]+}}(%esp), %ecx
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; CHECK-NEXT: movl 168(%ecx), %edx
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; CHECK-NEXT: movl 172(%ecx), %esi
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; CHECK-NEXT: movl 160(%ecx), %edi
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; CHECK-NEXT: movl 164(%ecx), %ecx
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; CHECK-NEXT: movl %ecx, {{[0-9]+}}(%esp)
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; CHECK-NEXT: movl %edi, (%esp)
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; CHECK-NEXT: movl %esi, {{[0-9]+}}(%esp)
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; CHECK-NEXT: movl %edx, {{[0-9]+}}(%esp)
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; CHECK-NEXT: shrl $31, %ecx
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; CHECK-NEXT: fildll (%esp)
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; CHECK-NEXT: fadds {{\.LCPI.*}}(,%ecx,4)
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; CHECK-NEXT: shrl $31, %esi
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; CHECK-NEXT: fildll {{[0-9]+}}(%esp)
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; CHECK-NEXT: fadds {{\.LCPI.*}}(,%esi,4)
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; CHECK-NEXT: fstps 84(%eax)
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; CHECK-NEXT: fstps 80(%eax)
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; CHECK-NEXT: addl $20, %esp
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; CHECK-NEXT: popl %esi
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; CHECK-NEXT: popl %edi
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; CHECK-NEXT: retl
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%t0 = getelementptr <2 x i64>, <2 x i64>* %src, i32 10
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%t1 = load <2 x i64>, <2 x i64>* %t0, align 16
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%t2 = uitofp <2 x i64> %t1 to <2 x float>
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%t3 = getelementptr <2 x float>, <2 x float>* %dest, i32 10
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store <2 x float> %t2, <2 x float>* %t3, align 8
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ret void
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}
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