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47a5355aae
Now that rG18c19441d105 has improved VPERM2X128 handling, we can perform this to improve x64->x32 truncation without poor cross-lane issues. Someday combineX86ShufflesRecursively will handle this, but we're still really bad at dealing with different vector widths.
21 lines
866 B
LLVM
21 lines
866 B
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=avx2 | FileCheck %s
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; Make sure this sequence doesn't hang in DAG combine.
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define <8 x i32> @foo(<8 x i64> %x, <4 x i64> %y) {
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; CHECK-LABEL: foo:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vandps %ymm2, %ymm0, %ymm0
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; CHECK-NEXT: vandps {{\.LCPI.*}}, %ymm1, %ymm1
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; CHECK-NEXT: vperm2f128 {{.*#+}} ymm2 = ymm0[2,3],ymm1[2,3]
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; CHECK-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0
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; CHECK-NEXT: vshufps {{.*#+}} ymm0 = ymm0[0,2],ymm2[0,2],ymm0[4,6],ymm2[4,6]
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; CHECK-NEXT: retl
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%a = shufflevector <4 x i64> %y, <4 x i64> <i64 12345, i64 67890, i64 13579, i64 24680>, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>
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%b = and <8 x i64> %x, %a
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%c = trunc <8 x i64> %b to <8 x i32>
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ret <8 x i32> %c
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}
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