1
0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-11-23 11:13:28 +01:00
llvm-mirror/test/CodeGen/X86/shl-crash-on-legalize.ll
Craig Topper d20adfcf42 [X86] Use custom isel for (X86sbb_flag 0, 0) so we can use 32-bit SBB for i8/i16.
We were using MOV32r0 and an extract_subreg as an input. By using
custom isel we can move the extract_subreg to after the SBB instead
of on the input.
2020-02-09 13:19:35 -08:00

42 lines
1.3 KiB
LLVM

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
;RUN: llc < %s | FileCheck %s
; This test case failed on legalization of "shl" node. PR29058.
target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@structMember = external local_unnamed_addr global i64, align 8
define i32 @PR29058(i8 %x, i32 %y) {
; CHECK-LABEL: PR29058:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: movl %esi, %ecx
; CHECK-NEXT: testb %dil, %dil
; CHECK-NEXT: movl $2147483646, %eax # imm = 0x7FFFFFFE
; CHECK-NEXT: cmovnel %esi, %eax
; CHECK-NEXT: xorl %edx, %edx
; CHECK-NEXT: cmpb $1, %dil
; CHECK-NEXT: sbbl %edx, %edx
; CHECK-NEXT: orb %dl, %cl
; CHECK-NEXT: # kill: def $cl killed $cl killed $ecx
; CHECK-NEXT: shll %cl, %eax
; CHECK-NEXT: movq %rax, {{.*}}(%rip)
; CHECK-NEXT: # kill: def $eax killed $eax killed $rax
; CHECK-NEXT: retq
entry:
%bool_1 = icmp ne i8 %x, 0
%bool_2 = icmp eq i8 %x, 0
%0 = select i1 %bool_2, i32 2147483646, i32 %y
%or_1 = select i1 %bool_1, i32 %y, i32 -1
%shl_1 = shl i32 %0, %or_1
%conv = zext i32 %shl_1 to i64
store i64 %conv, i64* @structMember, align 8
%tmp = select i1 %bool_2, i32 2147483646, i32 %y
%lnot = icmp eq i8 %x, 0
%or_2 = select i1 %lnot, i32 -1, i32 %y
%shl_2 = shl i32 %tmp, %or_2
ret i32 %shl_2
}