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mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-10-25 22:12:57 +02:00
llvm-mirror/test/CodeGen
Evan Cheng 44d2802e1d Shifter ops are not always free. Do not fold them (especially to form
complex load / store addressing mode) when they have higher cost and
when they have more than one use.

llvm-svn: 117509
2010-10-27 23:41:30 +00:00
..
Alpha
ARM Shifter ops are not always free. Do not fold them (especially to form 2010-10-27 23:41:30 +00:00
Blackfin
CBackend
CellSPU Change v64 datalayout in SPU. 2010-10-26 10:45:47 +00:00
CPP
Generic
MBlaze Recommit 116986 with capitalization typo fixed. 2010-10-21 03:57:26 +00:00
Mips Enable machine sinking critical edge splitting. e.g. 2010-09-20 22:52:00 +00:00
MSP430 CombinerAA is now reordering these stores. 2010-09-20 20:56:29 +00:00
PowerPC PowerPC varargs functions store live-in registers on the stack. Make sure we use 2010-10-11 20:43:09 +00:00
PTX Add test case mov.ll for PTX device function 2010-10-19 13:21:51 +00:00
SPARC
SystemZ
Thumb Try again to disable critical edge splitting in CodeGenPrepare. 2010-09-30 20:51:52 +00:00
Thumb2 More accurate estimate / tracking of register pressure. 2010-10-20 22:03:58 +00:00
X86 An stdcall function calling a non-stdcall function 2010-10-25 22:17:05 +00:00
XCore Enable machine sinking critical edge splitting. e.g. 2010-09-20 22:52:00 +00:00
thumb2-mul.ll Enable target-specific mul-lowering on ARM, even at -Os. Remove a test that this makes 2010-09-21 22:51:46 +00:00