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2fc9d5171e
and stores that have a specified alignment of less than 16 bytes now use instructions that support misaligned memory references. llvm-svn: 40015
8 lines
158 B
LLVM
8 lines
158 B
LLVM
; RUN: llvm-as < %s | llc -march=x86-64 | grep movdqa | wc -l | grep 1
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define <2 x i64> @bar(<2 x i64>* %p)
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{
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%t = load <2 x i64>* %p
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ret <2 x i64> %t
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}
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