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Some ARM instructions encode 32-bit immediates as a 8-bit integer (0-255) and a 4-bit rotation (0-30, even) in its least significant 12 bits. The original fixup, FK_Data_4, patches the instruction by the value bit-to-bit, regardless of the encoding. For example, assuming the label L1 and L2 are 0x0 and 0x104 respectively, the following instruction: add r0, r0, #(L2 - L1) ; expects 0x104, i.e., 260 would be assembled to the following, which adds 1 to r0, instead of 260: e2800104 add r0, r0, #4, 2 ; equivalently 1 The new fixup kind fixup_arm_mod_imm takes care of the encoding: e2800f41 add r0, r0, #260 Patch by Ting-Yuan Huang! llvm-svn: 265122
16 lines
273 B
ArmAsm
16 lines
273 B
ArmAsm
@ PR24346
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@ RUN: llvm-mc < %s -triple=arm-linux-gnueabi -filetype=obj -o - \
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@ RUN: | llvm-objdump --disassemble -arch=arm - | FileCheck %s
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.data
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.align 8
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L2:
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.word 0
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.align 8
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.word 0
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L1:
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.text
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@ CHECK: add r0, r0, #260
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add r0, r0, #(L1 - L2)
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