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If we know that the sign bit of a value being sign extended is zero, we can use a zero extension instead. This is motivated by the fact that zero extensions are generally cheaper on x86 (and most other architectures?). We already apply a similar transform in DAGCombine, this just extends that to the IR level. This comes up when we eagerly canonicalize gep indices to the width of a machine register (i64 on x86_64). To do so, we insert sign extensions (sext) to promote smaller types. Differential Revision: http://reviews.llvm.org/D7255 llvm-svn: 229189 |
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Hello | ||
InstCombine | ||
Instrumentation | ||
IPO | ||
ObjCARC | ||
Scalar | ||
Utils | ||
Vectorize | ||
CMakeLists.txt | ||
LLVMBuild.txt | ||
Makefile |