Simon Pilgrim 45ccdbff49 [X86] Auto upgrade XOP/AVX512 rotation intrinsics to generic funnel shift intrinsics (llvm) ...

This emits FSHL/FSHR generic intrinsics for the XOP VPROT and AVX512 VPROL/VPROR rotation intrinsics.

Clang counterpart: https://reviews.llvm.org/D55937

Differential Revision: https://reviews.llvm.org/D55938

llvm-svn: 349795

2018-12-20 19:01:07 +00:00

..

Analysis

Introduce llvm.loop.parallel_accesses and llvm.access.group metadata.

2018-12-20 04:58:07 +00:00

Assembler

[IR] Don't assume all functions are 4 byte aligned

2018-12-07 08:34:59 +00:00

Bindings

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Bitcode

[ThinLTO] Compute synthetic function entry count

2018-12-13 19:54:27 +00:00

BugPoint

[bugpoint][PR29027] Reduce function attributes

2018-12-19 03:42:19 +00:00

CodeGen

[X86] Auto upgrade XOP/AVX512 rotation intrinsics to generic funnel shift intrinsics (llvm)

2018-12-20 19:01:07 +00:00

DebugInfo

[CodeView] Emit global variables within lexical scopes to limit visibility

2018-12-20 17:33:45 +00:00

Demangle

[MS Demangler] Fail gracefully on invalid pointer types.

2018-12-14 18:10:13 +00:00

Examples

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ExecutionEngine

Implement IMAGE_REL_AMD64_SECREL for RuntimeDyldCOFFX86_64

2018-12-12 00:04:06 +00:00

Feature

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FileCheck

[FileCheck] Try to fix test on windows due to r349418

2018-12-18 01:17:28 +00:00

Instrumentation

[X86] Change 'simple nonmem' intrinsic test to not use PADDSW

2018-12-20 10:54:59 +00:00

Integer

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JitListener

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Linker

Implement -frecord-command-line (-frecord-gcc-switches)

2018-12-14 15:38:15 +00:00

LTO

[ThinLTO] Remove dllimport attribute from locally defined symbols

2018-12-19 19:07:45 +00:00

MC

[RISCV] Properly evaluate fixup_riscv_pcrel_lo12

2018-12-20 14:52:15 +00:00

Object

[Object] Deduplicate long archive member names

2018-12-19 16:15:05 +00:00

ObjectYAML

[WebAssembly] Check if the section order is correct

2018-12-15 00:58:12 +00:00

Other

[Unroll/UnrollAndJam/Vectorizer/Distribute] Add followup loop attributes.

2018-12-12 17:32:52 +00:00

SafepointIRVerifier

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SymbolRewriter

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TableGen

[TableGen] Preserve order of output operands in DAGISelMatcherGen

2018-12-05 00:47:59 +00:00

ThinLTO/X86

Introduce llvm.loop.parallel_accesses and llvm.access.group metadata.

2018-12-20 04:58:07 +00:00

tools

Add missing -oso-prepend-path to dsymutil test.

2018-12-20 18:47:17 +00:00

Transforms

[LAA] Avoid generating RT checks for known deps preventing vectorization.

2018-12-20 18:49:09 +00:00

Unit

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Verifier

Implement -frecord-command-line (-frecord-gcc-switches)

2018-12-14 15:38:15 +00:00

YAMLParser

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.clang-format

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CMakeLists.txt

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lit.cfg.py

[lit]Add llvm-readelf to tool substitutions

2018-12-12 10:34:01 +00:00

lit.site.cfg.py.in

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TestRunner.sh

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