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llvm-mirror/test/MC/Mips/mips32r5
Simon Dardis 53fab7b0ac [mips] Duplicate the reciprocal instruction definitions for FP32
Add instruction definitions for FP32 mode for recip.d and rsqrt.d.

Previously these instructions were only defined when targeting the
full 64-bit FPU model but were not guarded properly.

Reviewers: nitesh.jain, atanasyan

Differential Revision: https://reviews.llvm.org/D38400

llvm-svn: 315318
2017-10-10 14:41:11 +00:00
..
abiflags.s
invalid-mips32.s
invalid-mips32r2.s
invalid-mips32r3.s
invalid-mips64r2.s
invalid.s [mips][microMIPS] Implement LDC1, SDC1, LDC2, SDC2, LWC1, SWC1, LWC2 and SWC2 instructions and add CodeGen support 2016-07-11 07:41:56 +00:00
valid-xfail.s [mips] Correct c.cond.fmt instruction definition. 2017-01-16 13:55:58 +00:00
valid.s [mips] Duplicate the reciprocal instruction definitions for FP32 2017-10-10 14:41:11 +00:00