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Summary: Rework the GMIR documentation to focus more on the end user than the implementation and tie it in to the MIR document. There was also some out-of-date information which has been removed. The quality of the GenericOpcode reference is highly variable and drops sharply as I worked through them all but we've got to start somewhere :-). It would be great if others could expand on this too as there is an awful lot to get through. Also fix a typo in the definition of G_FLOG. Previously, the comments said we had two base-2's (G_FLOG and G_FLOG2). Reviewers: aemerson, volkan, rovka, arsenm Reviewed By: rovka Subscribers: wdng, arphaman, jfb, Petar.Avramovic, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D69545
106 lines
3.2 KiB
ReStructuredText
106 lines
3.2 KiB
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============================
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Global Instruction Selection
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============================
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.. warning::
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This document is a work in progress. It reflects the current state of the
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implementation, as well as open design and implementation issues.
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.. contents::
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:local:
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:depth: 1
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Introduction
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============
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GlobalISel is a framework that provides a set of reusable passes and utilities
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for instruction selection --- translation from LLVM IR to target-specific
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Machine IR (MIR).
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GlobalISel is intended to be a replacement for SelectionDAG and FastISel, to
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solve three major problems:
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* **Performance** --- SelectionDAG introduces a dedicated intermediate
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representation, which has a compile-time cost.
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GlobalISel directly operates on the post-isel representation used by the
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rest of the code generator, MIR.
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It does require extensions to that representation to support arbitrary
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incoming IR: :ref:`gmir`.
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* **Granularity** --- SelectionDAG and FastISel operate on individual basic
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blocks, losing some global optimization opportunities.
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GlobalISel operates on the whole function.
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* **Modularity** --- SelectionDAG and FastISel are radically different and share
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very little code.
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GlobalISel is built in a way that enables code reuse. For instance, both the
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optimized and fast selectors share the :ref:`pipeline`, and targets can
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configure that pipeline to better suit their needs.
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Design and Implementation Reference
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===================================
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More information on the design and implementation of GlobalISel can be found in
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the following sections.
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.. toctree::
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:maxdepth: 1
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GMIR
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GenericOpcode
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Pipeline
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Porting
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Resources
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More information on specific passes can be found in the following sections:
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.. toctree::
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:maxdepth: 1
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IRTranslator
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Legalizer
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RegBankSelect
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InstructionSelect
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KnownBits
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.. _progress:
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Progress and Future Work
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========================
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The initial goal is to replace FastISel on AArch64. The next step will be to
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replace SelectionDAG as the optimized ISel.
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``NOTE``:
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While we iterate on GlobalISel, we strive to avoid affecting the performance of
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SelectionDAG, FastISel, or the other MIR passes. For instance, the types of
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:ref:`gmir-gvregs` are stored in a separate table in ``MachineRegisterInfo``,
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that is destroyed after :ref:`instructionselect`.
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.. _progress-fastisel:
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FastISel Replacement
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--------------------
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For the initial FastISel replacement, we intend to fallback to SelectionDAG on
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selection failures.
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Currently, compile-time of the fast pipeline is within 1.5x of FastISel.
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We're optimistic we can get to within 1.1/1.2x, but beating FastISel will be
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challenging given the multi-pass approach.
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Still, supporting all IR (via a complete legalizer) and avoiding the fallback
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to SelectionDAG in the worst case should enable better amortized performance
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than SelectionDAG+FastISel.
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``NOTE``:
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We considered never having a fallback to SelectionDAG, instead deciding early
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whether a given function is supported by GlobalISel or not. The decision would
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be based on :ref:`milegalizer` queries.
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We abandoned that for two reasons:
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a) on IR inputs, we'd need to basically simulate the :ref:`irtranslator`;
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b) to be robust against unforeseen failures and to enable iterative
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improvements.
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