1
0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-11-23 11:13:28 +01:00
llvm-mirror/test/TableGen/BitOffsetDecoder.td
Jay Foad fdda5b21a5 [TableGen] Fix excessive compile time issue in FixedLenDecoderEmitter
This patch reduces the time taken for clang to compile the generated
disassembler for an out-of-tree target with InsnType bigger than 64 bits
from 4m30s to 48s.

D67686 did a similar thing for CodeEmitterGen.

The idea is to tweak the API of the APInt-like InsnType class so that
we don't need so many temporary InsnTypes. This takes advantage of the
rule stated in D52100 that currently "no string of bits extracted
from the encoding may exceeed 64-bits", so we can use uint64_t for some
temporaries.

D52100 goes on to say that "fields are still permitted to exceed 64-bits
so long as they aren't one contiguous string of bits". This patch breaks
that by always using a "uint64_t tmp" in the generated decodeToMCInst,
but it should be easy to fix in FilterChooser::emitBinaryParser by
choosing to use a different type of tmp based on the known total field
width.

Differential Revision: https://reviews.llvm.org/D98046
2021-03-17 09:28:50 +00:00

65 lines
1.7 KiB
TableGen

// RUN: llvm-tblgen -gen-disassembler -I %p/../../include %s | FileCheck %s
include "llvm/Target/Target.td"
def archInstrInfo : InstrInfo { }
def arch : Target {
let InstructionSet = archInstrInfo;
}
def Myi32 : Operand<i32> {
let DecoderMethod = "DecodeMyi32";
}
let OutOperandList = (outs), Size = 2 in {
def foo : Instruction {
let InOperandList = (ins i32imm:$factor);
field bits<16> Inst;
bits<32> factor;
let Inst{7...0} = 0xAA;
let Inst{14...8} = factor{6...0}; // no offset
let AsmString = "foo $factor";
field bits<16> SoftFail = 0;
}
def bar : Instruction {
let InOperandList = (ins i32imm:$factor);
field bits<16> Inst;
bits<32> factor;
let Inst{7...0} = 0xBB;
let Inst{15...8} = factor{10...3}; // offset by 3
let AsmString = "bar $factor";
field bits<16> SoftFail = 0;
}
def biz : Instruction {
let InOperandList = (ins i32imm:$factor);
field bits<16> Inst;
bits<32> factor;
let Inst{7...0} = 0xCC;
let Inst{11...8,15...12} = factor{10...3}; // offset by 3, multipart
let AsmString = "biz $factor";
field bits<16> SoftFail = 0;
}
def baz : Instruction {
let InOperandList = (ins Myi32:$factor);
field bits<16> Inst;
bits<32> factor;
let Inst{7...0} = 0xDD;
let Inst{15...8} = factor{11...4}; // offset by 4 + custom decode
let AsmString = "baz $factor";
field bits<16> SoftFail = 0;
}
}
// CHECK: tmp = fieldFromInstruction(insn, 8, 7);
// CHECK: tmp = fieldFromInstruction(insn, 8, 8) << 3;
// CHECK: insertBits(tmp, fieldFromInstruction(insn, 8, 4), 7, 4);
// CHECK: insertBits(tmp, fieldFromInstruction(insn, 12, 4), 3, 4);
// CHECK: tmp = fieldFromInstruction(insn, 8, 8) << 4;