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c74bcc2521
AEABI defines aligned variants of memcpy etc. that can be faster than the default version due to not having to do alignment checks. When emitting target code for these functions make use of these aligned variants if possible. Also convert memset to memclr if possible. Differential Revision: http://reviews.llvm.org/D8060 llvm-svn: 237127
76 lines
3.0 KiB
C++
76 lines
3.0 KiB
C++
//===-- ARMSelectionDAGInfo.h - ARM SelectionDAG Info -----------*- C++ -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file defines the ARM subclass for TargetSelectionDAGInfo.
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_LIB_TARGET_ARM_ARMSELECTIONDAGINFO_H
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#define LLVM_LIB_TARGET_ARM_ARMSELECTIONDAGINFO_H
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#include "MCTargetDesc/ARMAddressingModes.h"
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#include "llvm/Target/TargetSelectionDAGInfo.h"
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namespace llvm {
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namespace ARM_AM {
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static inline ShiftOpc getShiftOpcForNode(unsigned Opcode) {
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switch (Opcode) {
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default: return ARM_AM::no_shift;
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case ISD::SHL: return ARM_AM::lsl;
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case ISD::SRL: return ARM_AM::lsr;
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case ISD::SRA: return ARM_AM::asr;
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case ISD::ROTR: return ARM_AM::ror;
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//case ISD::ROTL: // Only if imm -> turn into ROTR.
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// Can't handle RRX here, because it would require folding a flag into
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// the addressing mode. :( This causes us to miss certain things.
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//case ARMISD::RRX: return ARM_AM::rrx;
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}
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}
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} // end namespace ARM_AM
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class ARMSelectionDAGInfo : public TargetSelectionDAGInfo {
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public:
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explicit ARMSelectionDAGInfo(const DataLayout &DL);
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~ARMSelectionDAGInfo();
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SDValue EmitTargetCodeForMemcpy(SelectionDAG &DAG, SDLoc dl,
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SDValue Chain,
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SDValue Dst, SDValue Src,
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SDValue Size, unsigned Align,
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bool isVolatile, bool AlwaysInline,
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MachinePointerInfo DstPtrInfo,
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MachinePointerInfo SrcPtrInfo) const override;
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SDValue EmitTargetCodeForMemmove(SelectionDAG &DAG, SDLoc dl,
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SDValue Chain,
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SDValue Dst, SDValue Src,
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SDValue Size, unsigned Align, bool isVolatile,
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MachinePointerInfo DstPtrInfo,
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MachinePointerInfo SrcPtrInfo) const override;
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// Adjust parameters for memset, see RTABI section 4.3.4
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SDValue EmitTargetCodeForMemset(SelectionDAG &DAG, SDLoc dl,
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SDValue Chain,
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SDValue Op1, SDValue Op2,
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SDValue Op3, unsigned Align,
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bool isVolatile,
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MachinePointerInfo DstPtrInfo) const override;
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SDValue EmitSpecializedLibcall(SelectionDAG &DAG, SDLoc dl,
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SDValue Chain,
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SDValue Dst, SDValue Src,
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SDValue Size, unsigned Align,
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RTLIB::Libcall LC) const;
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};
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}
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#endif
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