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If the return values can't be lowered to registers SelectionDAG performs the sret demotion. This patch contains the basic implementation for the same in the GlobalISel pipeline. Furthermore, targets should bring relevant changes during lowerFormalArguments, lowerReturn and lowerCall to make use of this feature. Reviewed By: arsenm Differential Revision: https://reviews.llvm.org/D92953
45 lines
1.5 KiB
C++
45 lines
1.5 KiB
C++
//===-- RISCVCallLowering.h - Call lowering ---------------------*- C++ -*-===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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//
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/// \file
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/// This file describes how to lower LLVM calls to machine code calls.
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_LIB_TARGET_RISCV_RISCVCALLLOWERING_H
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#define LLVM_LIB_TARGET_RISCV_RISCVCALLLOWERING_H
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#include "llvm/CodeGen/CallingConvLower.h"
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#include "llvm/CodeGen/GlobalISel/CallLowering.h"
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#include "llvm/CodeGen/ValueTypes.h"
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namespace llvm {
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class RISCVTargetLowering;
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class RISCVCallLowering : public CallLowering {
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public:
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RISCVCallLowering(const RISCVTargetLowering &TLI);
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bool lowerReturn(MachineIRBuilder &MIRBuiler, const Value *Val,
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ArrayRef<Register> VRegs,
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FunctionLoweringInfo &FLI) const override;
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bool lowerFormalArguments(MachineIRBuilder &MIRBuilder, const Function &F,
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ArrayRef<ArrayRef<Register>> VRegs,
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FunctionLoweringInfo &FLI) const override;
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bool lowerCall(MachineIRBuilder &MIRBuilder,
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CallLoweringInfo &Info) const override;
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};
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} // end namespace llvm
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#endif // LLVM_LIB_TARGET_RISCV_RISCVCALLLOWERING_H
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