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https://github.com/RPCS3/llvm-mirror.git
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b67cbcb910
This patch fixes VPIntrinsic::canIgnoreVectorLength when used on a VPIntrinsic with scalable vector types. Also includes new unittest cases for the '<vscale x 1 x whatever>' and '%evl == vscale' corner cases.
159 lines
6.6 KiB
C++
159 lines
6.6 KiB
C++
//===- VPIntrinsicTest.cpp - VPIntrinsic unit tests ---------===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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#include "llvm/ADT/SmallVector.h"
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#include "llvm/AsmParser/Parser.h"
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#include "llvm/IR/Constants.h"
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#include "llvm/IR/IRBuilder.h"
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#include "llvm/IR/IntrinsicInst.h"
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#include "llvm/IR/LLVMContext.h"
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#include "llvm/IR/Module.h"
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#include "llvm/IR/Verifier.h"
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#include "llvm/Support/SourceMgr.h"
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#include "gtest/gtest.h"
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using namespace llvm;
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namespace {
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class VPIntrinsicTest : public testing::Test {
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protected:
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LLVMContext Context;
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VPIntrinsicTest() : Context() {}
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LLVMContext C;
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SMDiagnostic Err;
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std::unique_ptr<Module> CreateVPDeclarationModule() {
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return parseAssemblyString(
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" declare <8 x i32> @llvm.vp.add.v8i32(<8 x i32>, <8 x i32>, <8 x i1>, i32) "
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" declare <8 x i32> @llvm.vp.sub.v8i32(<8 x i32>, <8 x i32>, <8 x i1>, i32) "
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" declare <8 x i32> @llvm.vp.mul.v8i32(<8 x i32>, <8 x i32>, <8 x i1>, i32) "
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" declare <8 x i32> @llvm.vp.sdiv.v8i32(<8 x i32>, <8 x i32>, <8 x i1>, i32) "
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" declare <8 x i32> @llvm.vp.srem.v8i32(<8 x i32>, <8 x i32>, <8 x i1>, i32) "
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" declare <8 x i32> @llvm.vp.udiv.v8i32(<8 x i32>, <8 x i32>, <8 x i1>, i32) "
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" declare <8 x i32> @llvm.vp.urem.v8i32(<8 x i32>, <8 x i32>, <8 x i1>, i32) "
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" declare <8 x i32> @llvm.vp.and.v8i32(<8 x i32>, <8 x i32>, <8 x i1>, i32) "
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" declare <8 x i32> @llvm.vp.xor.v8i32(<8 x i32>, <8 x i32>, <8 x i1>, i32) "
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" declare <8 x i32> @llvm.vp.or.v8i32(<8 x i32>, <8 x i32>, <8 x i1>, i32) "
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" declare <8 x i32> @llvm.vp.ashr.v8i32(<8 x i32>, <8 x i32>, <8 x i1>, i32) "
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" declare <8 x i32> @llvm.vp.lshr.v8i32(<8 x i32>, <8 x i32>, <8 x i1>, i32) "
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" declare <8 x i32> @llvm.vp.shl.v8i32(<8 x i32>, <8 x i32>, <8 x i1>, i32) ",
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Err, C);
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}
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};
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/// Check that VPIntrinsic:canIgnoreVectorLengthParam() returns true
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/// if the vector length parameter does not mask off any lanes.
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TEST_F(VPIntrinsicTest, CanIgnoreVectorLength) {
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LLVMContext C;
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SMDiagnostic Err;
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std::unique_ptr<Module> M =
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parseAssemblyString(
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"declare <256 x i64> @llvm.vp.mul.v256i64(<256 x i64>, <256 x i64>, <256 x i1>, i32)"
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"declare <vscale x 2 x i64> @llvm.vp.mul.nxv2i64(<vscale x 2 x i64>, <vscale x 2 x i64>, <vscale x 2 x i1>, i32)"
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"declare <vscale x 1 x i64> @llvm.vp.mul.nxv1i64(<vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i1>, i32)"
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"declare i32 @llvm.vscale.i32()"
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"define void @test_static_vlen( "
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" <256 x i64> %i0, <vscale x 2 x i64> %si0x2, <vscale x 1 x i64> %si0x1,"
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" <256 x i64> %i1, <vscale x 2 x i64> %si1x2, <vscale x 1 x i64> %si1x1,"
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" <256 x i1> %m, <vscale x 2 x i1> %smx2, <vscale x 1 x i1> %smx1, i32 %vl) { "
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" %r0 = call <256 x i64> @llvm.vp.mul.v256i64(<256 x i64> %i0, <256 x i64> %i1, <256 x i1> %m, i32 %vl)"
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" %r1 = call <256 x i64> @llvm.vp.mul.v256i64(<256 x i64> %i0, <256 x i64> %i1, <256 x i1> %m, i32 256)"
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" %r2 = call <256 x i64> @llvm.vp.mul.v256i64(<256 x i64> %i0, <256 x i64> %i1, <256 x i1> %m, i32 0)"
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" %r3 = call <256 x i64> @llvm.vp.mul.v256i64(<256 x i64> %i0, <256 x i64> %i1, <256 x i1> %m, i32 7)"
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" %r4 = call <256 x i64> @llvm.vp.mul.v256i64(<256 x i64> %i0, <256 x i64> %i1, <256 x i1> %m, i32 123)"
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" %vs = call i32 @llvm.vscale.i32()"
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" %vs.x2 = mul i32 %vs, 2"
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" %r5 = call <vscale x 2 x i64> @llvm.vp.mul.nxv2i64(<vscale x 2 x i64> %si0x2, <vscale x 2 x i64> %si1x2, <vscale x 2 x i1> %smx2, i32 %vs.x2)"
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" %r6 = call <vscale x 2 x i64> @llvm.vp.mul.nxv2i64(<vscale x 2 x i64> %si0x2, <vscale x 2 x i64> %si1x2, <vscale x 2 x i1> %smx2, i32 %vs)"
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" %r7 = call <vscale x 2 x i64> @llvm.vp.mul.nxv2i64(<vscale x 2 x i64> %si0x2, <vscale x 2 x i64> %si1x2, <vscale x 2 x i1> %smx2, i32 99999)"
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" %r8 = call <vscale x 1 x i64> @llvm.vp.mul.nxv1i64(<vscale x 1 x i64> %si0x1, <vscale x 1 x i64> %si1x1, <vscale x 1 x i1> %smx1, i32 %vs)"
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" %r9 = call <vscale x 1 x i64> @llvm.vp.mul.nxv1i64(<vscale x 1 x i64> %si0x1, <vscale x 1 x i64> %si1x1, <vscale x 1 x i1> %smx1, i32 1)"
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" %r10 = call <vscale x 1 x i64> @llvm.vp.mul.nxv1i64(<vscale x 1 x i64> %si0x1, <vscale x 1 x i64> %si1x1, <vscale x 1 x i1> %smx1, i32 %vs.x2)"
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" %vs.wat = add i32 %vs, 2"
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" %r11 = call <vscale x 2 x i64> @llvm.vp.mul.nxv2i64(<vscale x 2 x i64> %si0x2, <vscale x 2 x i64> %si1x2, <vscale x 2 x i1> %smx2, i32 %vs.wat)"
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" ret void "
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"}",
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Err, C);
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auto *F = M->getFunction("test_static_vlen");
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assert(F);
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const int NumExpected = 12;
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const bool Expected[] = {false, true, false, false, false, true, false, false, true, false, true, false};
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int i = 0;
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for (auto &I : F->getEntryBlock()) {
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VPIntrinsic *VPI = dyn_cast<VPIntrinsic>(&I);
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if (!VPI)
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continue;
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ASSERT_LT(i, NumExpected);
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ASSERT_EQ(Expected[i], VPI->canIgnoreVectorLengthParam());
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++i;
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}
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}
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/// Check that the argument returned by
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/// VPIntrinsic::Get<X>ParamPos(Intrinsic::ID) has the expected type.
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TEST_F(VPIntrinsicTest, GetParamPos) {
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std::unique_ptr<Module> M = CreateVPDeclarationModule();
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assert(M);
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for (Function &F : *M) {
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ASSERT_TRUE(F.isIntrinsic());
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Optional<int> MaskParamPos =
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VPIntrinsic::GetMaskParamPos(F.getIntrinsicID());
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if (MaskParamPos.hasValue()) {
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Type *MaskParamType = F.getArg(MaskParamPos.getValue())->getType();
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ASSERT_TRUE(MaskParamType->isVectorTy());
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ASSERT_TRUE(cast<VectorType>(MaskParamType)->getElementType()->isIntegerTy(1));
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}
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Optional<int> VecLenParamPos =
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VPIntrinsic::GetVectorLengthParamPos(F.getIntrinsicID());
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if (VecLenParamPos.hasValue()) {
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Type *VecLenParamType = F.getArg(VecLenParamPos.getValue())->getType();
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ASSERT_TRUE(VecLenParamType->isIntegerTy(32));
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}
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}
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}
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/// Check that going from Opcode to VP intrinsic and back results in the same
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/// Opcode.
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TEST_F(VPIntrinsicTest, OpcodeRoundTrip) {
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std::vector<unsigned> Opcodes;
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Opcodes.reserve(100);
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{
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#define HANDLE_INST(OCNum, OCName, Class) Opcodes.push_back(OCNum);
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#include "llvm/IR/Instruction.def"
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}
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unsigned FullTripCounts = 0;
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for (unsigned OC : Opcodes) {
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Intrinsic::ID VPID = VPIntrinsic::GetForOpcode(OC);
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// no equivalent VP intrinsic available
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if (VPID == Intrinsic::not_intrinsic)
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continue;
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unsigned RoundTripOC = VPIntrinsic::GetFunctionalOpcodeForVP(VPID);
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// no equivalent Opcode available
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if (RoundTripOC == Instruction::Call)
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continue;
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ASSERT_EQ(RoundTripOC, OC);
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++FullTripCounts;
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}
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ASSERT_NE(FullTripCounts, 0u);
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}
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} // end anonymous namespace
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