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llvm-mirror/lib/Target/PowerPC/PPC.h
Chris Lattner d5a087b439 Implement a basic MCCodeEmitter for PPC. This doesn't handle
fixups yet, and doesn't handle actually encoding operand values,
but this is enough for llc -show-mc-encoding to show the base
instruction encoding information, e.g.:

	mflr r0                         ; encoding: [0x7c,0x08,0x02,0xa6]
	stw r0, 8(r1)                   ; encoding: [0x90,0x00,0x00,0x00]
	stwu r1, -64(r1)                ; encoding: [0x94,0x00,0x00,0x00]
Ltmp0:
	lhz r4, 4(r3)                   ; encoding: [0xa0,0x00,0x00,0x00]
	cmplwi cr0, r4, 8               ; encoding: [0x28,0x00,0x00,0x00]
	beq cr0, LBB0_2                 ; encoding: [0x40,0x00,0x00,0x00]

llvm-svn: 119116
2010-11-15 04:16:32 +00:00

90 lines
2.9 KiB
C++

//===-- PPC.h - Top-level interface for PowerPC Target ----------*- C++ -*-===//
//
// The LLVM Compiler Infrastructure
//
// This file is distributed under the University of Illinois Open Source
// License. See LICENSE.TXT for details.
//
//===----------------------------------------------------------------------===//
//
// This file contains the entry points for global functions defined in the LLVM
// PowerPC back-end.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_TARGET_POWERPC_H
#define LLVM_TARGET_POWERPC_H
// GCC #defines PPC on Linux but we use it as our namespace name
#undef PPC
namespace llvm {
class PPCTargetMachine;
class FunctionPass;
class formatted_raw_ostream;
class JITCodeEmitter;
class Target;
class MachineInstr;
class AsmPrinter;
class MCInst;
class MCCodeEmitter;
class MCContext;
class TargetMachine;
FunctionPass *createPPCBranchSelectionPass();
FunctionPass *createPPCISelDag(PPCTargetMachine &TM);
FunctionPass *createPPCJITCodeEmitterPass(PPCTargetMachine &TM,
JITCodeEmitter &MCE);
MCCodeEmitter *createPPCMCCodeEmitter(const Target &, TargetMachine &TM,
MCContext &Ctx);
void LowerPPCMachineInstrToMCInst(const MachineInstr *MI, MCInst &OutMI,
AsmPrinter &AP);
extern Target ThePPC32Target;
extern Target ThePPC64Target;
namespace PPCII {
/// Target Operand Flag enum.
enum TOF {
//===------------------------------------------------------------------===//
// PPC Specific MachineOperand flags.
MO_NO_FLAG,
/// MO_DARWIN_STUB - On a symbol operand "FOO", this indicates that the
/// reference is actually to the "FOO$stub" symbol. This is used for calls
/// and jumps to external functions on Tiger and earlier.
MO_DARWIN_STUB = 1,
/// MO_LO16, MO_HA16 - lo16(symbol) and ha16(symbol)
MO_LO16 = 4, MO_HA16 = 8,
/// MO_PIC_FLAG - If this bit is set, the symbol reference is relative to
/// the function's picbase, e.g. lo16(symbol-picbase).
MO_PIC_FLAG = 16,
/// MO_NLP_FLAG - If this bit is set, the symbol reference is actually to
/// the non_lazy_ptr for the global, e.g. lo16(symbol$non_lazy_ptr-picbase).
MO_NLP_FLAG = 32,
/// MO_NLP_HIDDEN_FLAG - If this bit is set, the symbol reference is to a
/// symbol with hidden visibility. This causes a different kind of
/// non-lazy-pointer to be generated.
MO_NLP_HIDDEN_FLAG = 64
};
} // end namespace PPCII
} // end namespace llvm;
// Defines symbolic names for PowerPC registers. This defines a mapping from
// register name to register number.
//
#include "PPCGenRegisterNames.inc"
// Defines symbolic names for the PowerPC instructions.
//
#include "PPCGenInstrNames.inc"
#endif