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1431b3c2f5
This adds all CodeGen tests for the SystemZ target. This version of the patch incorporates feedback from a review by Sean Silva. Thanks to all reviewers! Patch by Richard Sandiford. llvm-svn: 181204
225 lines
5.1 KiB
LLVM
225 lines
5.1 KiB
LLVM
; Test insertions of 32-bit constants into one half of an i64.
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;
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; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s
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; Prefer LHI over IILF for signed 16-bit constants.
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define i64 @f1(i64 %a) {
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; CHECK: f1:
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; CHECK-NOT: ni
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; CHECK: lhi %r2, 1
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; CHECK: br %r14
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%and = and i64 %a, 18446744069414584320
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%or = or i64 %and, 1
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ret i64 %or
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}
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; Check the high end of the LHI range.
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define i64 @f2(i64 %a) {
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; CHECK: f2:
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; CHECK-NOT: ni
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; CHECK: lhi %r2, 32767
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; CHECK: br %r14
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%and = and i64 %a, 18446744069414584320
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%or = or i64 %and, 32767
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ret i64 %or
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}
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; Check the next value up, which should use IILF instead.
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define i64 @f3(i64 %a) {
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; CHECK: f3:
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; CHECK-NOT: ni
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; CHECK: iilf %r2, 32768
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; CHECK: br %r14
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%and = and i64 %a, 18446744069414584320
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%or = or i64 %and, 32768
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ret i64 %or
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}
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; Check a value in which the lower 16 bits are clear.
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define i64 @f4(i64 %a) {
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; CHECK: f4:
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; CHECK-NOT: ni
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; CHECK: iilf %r2, 65536
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; CHECK: br %r14
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%and = and i64 %a, 18446744069414584320
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%or = or i64 %and, 65536
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ret i64 %or
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}
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; Check the highest useful IILF value (-0x8001).
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define i64 @f5(i64 %a) {
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; CHECK: f5:
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; CHECK-NOT: ni
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; CHECK: iilf %r2, 4294934527
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; CHECK: br %r14
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%and = and i64 %a, 18446744069414584320
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%or = or i64 %and, 4294934527
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ret i64 %or
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}
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; Check the next value up, which should use LHI instead.
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define i64 @f6(i64 %a) {
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; CHECK: f6:
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; CHECK-NOT: ni
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; CHECK: lhi %r2, -32768
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; CHECK: br %r14
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%and = and i64 %a, 18446744069414584320
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%or = or i64 %and, 4294934528
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ret i64 %or
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}
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; Check the highest useful LHI value. (We use OILF for -1 instead, although
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; LHI might be better there too.)
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define i64 @f7(i64 %a) {
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; CHECK: f7:
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; CHECK-NOT: ni
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; CHECK: lhi %r2, -2
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; CHECK: br %r14
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%and = and i64 %a, 18446744069414584320
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%or = or i64 %and, 4294967294
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ret i64 %or
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}
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; Check that SRLG is still used if some of the high bits are known to be 0
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; (and so might be removed from the mask).
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define i64 @f8(i64 %a) {
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; CHECK: f8:
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; CHECK: srlg %r2, %r2, 1
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; CHECK-NEXT: iilf %r2, 32768
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; CHECK: br %r14
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%shifted = lshr i64 %a, 1
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%and = and i64 %shifted, 18446744069414584320
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%or = or i64 %and, 32768
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ret i64 %or
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}
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; Repeat f8 with addition, which is known to be equivalent to OR in this case.
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define i64 @f9(i64 %a) {
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; CHECK: f9:
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; CHECK: srlg %r2, %r2, 1
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; CHECK-NEXT: iilf %r2, 32768
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; CHECK: br %r14
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%shifted = lshr i64 %a, 1
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%and = and i64 %shifted, 18446744069414584320
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%or = add i64 %and, 32768
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ret i64 %or
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}
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; Repeat f8 with already-zero bits removed from the mask.
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define i64 @f10(i64 %a) {
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; CHECK: f10:
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; CHECK: srlg %r2, %r2, 1
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; CHECK-NEXT: iilf %r2, 32768
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; CHECK: br %r14
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%shifted = lshr i64 %a, 1
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%and = and i64 %shifted, 9223372032559808512
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%or = or i64 %and, 32768
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ret i64 %or
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}
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; Repeat f10 with addition, which is known to be equivalent to OR in this case.
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define i64 @f11(i64 %a) {
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; CHECK: f11:
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; CHECK: srlg %r2, %r2, 1
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; CHECK-NEXT: iilf %r2, 32768
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; CHECK: br %r14
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%shifted = lshr i64 %a, 1
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%and = and i64 %shifted, 9223372032559808512
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%or = add i64 %and, 32768
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ret i64 %or
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}
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; Check the lowest useful IIHF value.
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define i64 @f12(i64 %a) {
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; CHECK: f12:
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; CHECK-NOT: ni
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; CHECK: iihf %r2, 1
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; CHECK: br %r14
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%and = and i64 %a, 4294967295
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%or = or i64 %and, 4294967296
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ret i64 %or
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}
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; Check a value in which the lower 16 bits are clear.
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define i64 @f13(i64 %a) {
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; CHECK: f13:
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; CHECK-NOT: ni
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; CHECK: iihf %r2, 2147483648
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; CHECK: br %r14
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%and = and i64 %a, 4294967295
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%or = or i64 %and, 9223372036854775808
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ret i64 %or
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}
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; Check the highest useful IIHF value (0xfffffffe).
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define i64 @f14(i64 %a) {
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; CHECK: f14:
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; CHECK-NOT: ni
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; CHECK: iihf %r2, 4294967294
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; CHECK: br %r14
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%and = and i64 %a, 4294967295
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%or = or i64 %and, 18446744065119617024
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ret i64 %or
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}
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; Check a case in which some of the low 32 bits are known to be clear,
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; and so could be removed from the AND mask.
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define i64 @f15(i64 %a) {
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; CHECK: f15:
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; CHECK: sllg %r2, %r2, 1
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; CHECK-NEXT: iihf %r2, 1
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; CHECK: br %r14
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%shifted = shl i64 %a, 1
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%and = and i64 %shifted, 4294967295
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%or = or i64 %and, 4294967296
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ret i64 %or
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}
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; Repeat f15 with the zero bits explicitly removed from the mask.
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define i64 @f16(i64 %a) {
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; CHECK: f16:
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; CHECK: sllg %r2, %r2, 1
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; CHECK-NEXT: iihf %r2, 1
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; CHECK: br %r14
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%shifted = shl i64 %a, 1
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%and = and i64 %shifted, 4294967294
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%or = or i64 %and, 4294967296
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ret i64 %or
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}
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; Check concatenation of two i32s.
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define i64 @f17(i32 %a) {
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; CHECK: f17:
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; CHECK: msr %r2, %r2
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; CHECK-NEXT: iihf %r2, 1
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; CHECK: br %r14
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%mul = mul i32 %a, %a
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%ext = zext i32 %mul to i64
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%or = or i64 %ext, 4294967296
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ret i64 %or
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}
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; Repeat f17 with the operands reversed.
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define i64 @f18(i32 %a) {
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; CHECK: f18:
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; CHECK: msr %r2, %r2
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; CHECK-NEXT: iihf %r2, 1
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; CHECK: br %r14
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%mul = mul i32 %a, %a
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%ext = zext i32 %mul to i64
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%or = or i64 4294967296, %ext
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ret i64 %or
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}
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; The truncation here isn't free; we need an explicit zero extension.
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define i64 @f19(i32 %a) {
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; CHECK: f19:
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; CHECK: llgcr %r2, %r2
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; CHECK: oihl %r2, 1
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; CHECK: br %r14
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%trunc = trunc i32 %a to i8
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%ext = zext i8 %trunc to i64
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%or = or i64 %ext, 4294967296
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ret i64 %or
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}
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