1
0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-11-23 03:02:36 +01:00
llvm-mirror/test/CodeGen/PowerPC/ppc32-align-long-double-sf.ll
Francis Visoiu Mistrih cd4ff3e8fc [CodeGen] Always use printReg to print registers in both MIR and debug
output

As part of the unification of the debug format and the MIR format,
always use `printReg` to print all kinds of registers.

Updated the tests using '_' instead of '%noreg' until we decide which
one we want to be the default one.

Differential Revision: https://reviews.llvm.org/D40421

llvm-svn: 319445
2017-11-30 16:12:24 +00:00

22 lines
771 B
LLVM

; RUN: llc -verify-machineinstrs -O2 -mtriple=powerpc-unknown-linux-gnu < %s | FileCheck %s
@x = global ppc_fp128 0xM405EDA5E353F7CEE0000000000000000, align 16
@.str = private unnamed_addr constant [5 x i8] c"%Lf\0A\00", align 1
define void @foo() #0 {
entry:
%0 = load ppc_fp128, ppc_fp128* @x, align 16
%call = tail call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i32 0, i32 0), ppc_fp128 %0)
ret void
}
; Do not skip register r4 because of register alignment in soft float mode. Instead skipping
; put in r4 part of first argument for printf function (long double).
; CHECK: lwzu 4, x@l({{[0-9]+}})
declare i32 @printf(i8* nocapture readonly, ...) #0
attributes #0 = { "use-soft-float"="true" }