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8fc62308ad
Summary: This patch add the InstAlias definitions for below instructions. ADDI ADDIS ADDI8 ADDIS8 RLWINM8 ISEL ISEL8 OR OR_rec ORI ORI8 XORI8 CNTLZW8 CNTLZW8_rec TEND TSR RFEBB NOR NOR_rec MTCRF SUBF SUBF_rec SUBFC SUBFC_rec RLDICL_32_64 TW Reviewed By: steven.zhang Differential Revision: https://reviews.llvm.org/D77559
52 lines
1.5 KiB
LLVM
52 lines
1.5 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -mcpu=pwr9 -O3 < %s | FileCheck %s -check-prefix=PPC64LE
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target datalayout = "e-m:e-i64:64-n32:64"
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target triple = "powerpc64le-unknown-linux-gnu"
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@global.6 = external global i32*
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declare void @barney.88(i1, i32*)
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declare void @barney.94(i8*, i32)
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define void @redundancy_on_ppc_only(i1 %arg7) nounwind {
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; PPC64LE-LABEL: redundancy_on_ppc_only:
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; PPC64LE: # %bb.0: # %bb
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; PPC64LE-NEXT: mflr 0
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; PPC64LE-NEXT: andi. 3, 3, 1
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; PPC64LE-NEXT: std 0, 16(1)
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; PPC64LE-NEXT: stdu 1, -32(1)
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; PPC64LE-NEXT: li 3, 1
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; PPC64LE-NEXT: li 4, 0
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; PPC64LE-NEXT: iselgt 3, 3, 4
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; PPC64LE-NEXT: bl barney.88
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; PPC64LE-NEXT: nop
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; PPC64LE-NEXT: addi 1, 1, 32
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; PPC64LE-NEXT: ld 0, 16(1)
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; PPC64LE-NEXT: mtlr 0
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; PPC64LE-NEXT: blr
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bb:
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br label %bb10
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bb10: ; preds = %bb
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call void @barney.88(i1 %arg7, i32* null)
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ret void
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}
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define void @redundancy_on_ppc_and_other_targets() nounwind {
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; PPC64LE-LABEL: redundancy_on_ppc_and_other_targets:
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; PPC64LE: # %bb.0:
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; PPC64LE-NEXT: mflr 0
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; PPC64LE-NEXT: std 0, 16(1)
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; PPC64LE-NEXT: stdu 1, -32(1)
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; PPC64LE-NEXT: addis 3, 2, .LC0@toc@ha
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; PPC64LE-NEXT: ld 3, .LC0@toc@l(3)
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; PPC64LE-NEXT: li 4, 0
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; PPC64LE-NEXT: std 4, 0(3)
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; PPC64LE-NEXT: bl barney.94
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; PPC64LE-NEXT: nop
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store i32* null, i32** @global.6
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call void @barney.94(i8* undef, i32 0)
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unreachable
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}
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