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llvm-mirror/test/CodeGen/Hexagon/fsel.ll
Krzysztof Parzyszek 631100a1eb [Hexagon] Use integer instructions for floating point immediates
Floating point instructions use general purpose registers, so the few
instructions that can put floating point immediates into registers are,
in fact, integer instruction. Use them explicitly instead of having
pseudo-instructions specifically for dealing with floating point values.

Simplify the constant loading instructions (from sdata) to have only two:
one for 32-bit values and one for 64-bit values: CONST32 and CONST64.

llvm-svn: 278244
2016-08-10 16:46:36 +00:00

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LLVM

; RUN: llc -march=hexagon -O0 < %s | FileCheck %s
; CHECK-LABEL: danny:
; CHECK: mux(p0, r1, ##1065353216)
define float @danny(i32 %x, float %f) #0 {
%t = icmp sgt i32 %x, 0
%u = select i1 %t, float %f, float 1.0
ret float %u
}
; CHECK-LABEL: sammy:
; CHECK: mux(p0, ##1069547520, r1)
define float @sammy(i32 %x, float %f) #0 {
%t = icmp sgt i32 %x, 0
%u = select i1 %t, float 1.5, float %f
ret float %u
}
attributes #0 = { nounwind "target-cpu"="hexagonv5" }