mirror of
https://github.com/RPCS3/llvm-mirror.git
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b05e065c7b
llvm-svn: 181255
253 lines
8.2 KiB
C++
253 lines
8.2 KiB
C++
//===-- HexagonCFGOptimizer.cpp - CFG optimizations -----------------------===//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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#define DEBUG_TYPE "hexagon_cfg"
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#include "Hexagon.h"
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#include "HexagonMachineFunctionInfo.h"
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#include "HexagonSubtarget.h"
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#include "HexagonTargetMachine.h"
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#include "llvm/CodeGen/MachineDominators.h"
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#include "llvm/CodeGen/MachineFunctionPass.h"
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#include "llvm/CodeGen/MachineInstrBuilder.h"
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#include "llvm/CodeGen/MachineLoopInfo.h"
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#include "llvm/CodeGen/MachineRegisterInfo.h"
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#include "llvm/CodeGen/Passes.h"
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#include "llvm/Support/Compiler.h"
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#include "llvm/Support/Debug.h"
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#include "llvm/Support/MathExtras.h"
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#include "llvm/Target/TargetInstrInfo.h"
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#include "llvm/Target/TargetMachine.h"
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#include "llvm/Target/TargetRegisterInfo.h"
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using namespace llvm;
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namespace llvm {
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void initializeHexagonCFGOptimizerPass(PassRegistry&);
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}
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namespace {
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class HexagonCFGOptimizer : public MachineFunctionPass {
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private:
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const HexagonTargetMachine& QTM;
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const HexagonSubtarget &QST;
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void InvertAndChangeJumpTarget(MachineInstr*, MachineBasicBlock*);
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public:
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static char ID;
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HexagonCFGOptimizer(const HexagonTargetMachine& TM)
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: MachineFunctionPass(ID), QTM(TM), QST(*TM.getSubtargetImpl()) {
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initializeHexagonCFGOptimizerPass(*PassRegistry::getPassRegistry());
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}
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const char *getPassName() const {
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return "Hexagon CFG Optimizer";
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}
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bool runOnMachineFunction(MachineFunction &Fn);
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};
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char HexagonCFGOptimizer::ID = 0;
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static bool IsConditionalBranch(int Opc) {
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return (Opc == Hexagon::JMP_t) || (Opc == Hexagon::JMP_f)
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|| (Opc == Hexagon::JMP_tnew_t) || (Opc == Hexagon::JMP_fnew_t);
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}
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static bool IsUnconditionalJump(int Opc) {
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return (Opc == Hexagon::JMP);
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}
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void
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HexagonCFGOptimizer::InvertAndChangeJumpTarget(MachineInstr* MI,
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MachineBasicBlock* NewTarget) {
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const HexagonInstrInfo *QII = QTM.getInstrInfo();
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int NewOpcode = 0;
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switch(MI->getOpcode()) {
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case Hexagon::JMP_t:
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NewOpcode = Hexagon::JMP_f;
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break;
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case Hexagon::JMP_f:
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NewOpcode = Hexagon::JMP_t;
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break;
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case Hexagon::JMP_tnew_t:
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NewOpcode = Hexagon::JMP_fnew_t;
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break;
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case Hexagon::JMP_fnew_t:
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NewOpcode = Hexagon::JMP_tnew_t;
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break;
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default:
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llvm_unreachable("Cannot handle this case");
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}
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MI->setDesc(QII->get(NewOpcode));
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MI->getOperand(1).setMBB(NewTarget);
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}
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bool HexagonCFGOptimizer::runOnMachineFunction(MachineFunction &Fn) {
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// Loop over all of the basic blocks.
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for (MachineFunction::iterator MBBb = Fn.begin(), MBBe = Fn.end();
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MBBb != MBBe; ++MBBb) {
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MachineBasicBlock* MBB = MBBb;
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// Traverse the basic block.
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MachineBasicBlock::iterator MII = MBB->getFirstTerminator();
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if (MII != MBB->end()) {
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MachineInstr *MI = MII;
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int Opc = MI->getOpcode();
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if (IsConditionalBranch(Opc)) {
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//
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// (Case 1) Transform the code if the following condition occurs:
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// BB1: if (p0) jump BB3
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// ...falls-through to BB2 ...
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// BB2: jump BB4
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// ...next block in layout is BB3...
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// BB3: ...
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//
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// Transform this to:
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// BB1: if (!p0) jump BB4
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// Remove BB2
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// BB3: ...
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//
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// (Case 2) A variation occurs when BB3 contains a JMP to BB4:
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// BB1: if (p0) jump BB3
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// ...falls-through to BB2 ...
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// BB2: jump BB4
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// ...other basic blocks ...
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// BB4:
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// ...not a fall-thru
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// BB3: ...
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// jump BB4
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//
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// Transform this to:
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// BB1: if (!p0) jump BB4
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// Remove BB2
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// BB3: ...
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// BB4: ...
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//
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unsigned NumSuccs = MBB->succ_size();
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MachineBasicBlock::succ_iterator SI = MBB->succ_begin();
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MachineBasicBlock* FirstSucc = *SI;
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MachineBasicBlock* SecondSucc = *(++SI);
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MachineBasicBlock* LayoutSucc = NULL;
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MachineBasicBlock* JumpAroundTarget = NULL;
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if (MBB->isLayoutSuccessor(FirstSucc)) {
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LayoutSucc = FirstSucc;
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JumpAroundTarget = SecondSucc;
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} else if (MBB->isLayoutSuccessor(SecondSucc)) {
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LayoutSucc = SecondSucc;
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JumpAroundTarget = FirstSucc;
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} else {
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// Odd case...cannot handle.
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}
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// The target of the unconditional branch must be JumpAroundTarget.
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// TODO: If not, we should not invert the unconditional branch.
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MachineBasicBlock* CondBranchTarget = NULL;
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if ((MI->getOpcode() == Hexagon::JMP_t) ||
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(MI->getOpcode() == Hexagon::JMP_f)) {
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CondBranchTarget = MI->getOperand(1).getMBB();
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}
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if (!LayoutSucc || (CondBranchTarget != JumpAroundTarget)) {
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continue;
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}
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if ((NumSuccs == 2) && LayoutSucc && (LayoutSucc->pred_size() == 1)) {
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// Ensure that BB2 has one instruction -- an unconditional jump.
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if ((LayoutSucc->size() == 1) &&
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IsUnconditionalJump(LayoutSucc->front().getOpcode())) {
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MachineBasicBlock* UncondTarget =
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LayoutSucc->front().getOperand(0).getMBB();
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// Check if the layout successor of BB2 is BB3.
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bool case1 = LayoutSucc->isLayoutSuccessor(JumpAroundTarget);
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bool case2 = JumpAroundTarget->isSuccessor(UncondTarget) &&
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JumpAroundTarget->size() >= 1 &&
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IsUnconditionalJump(JumpAroundTarget->back().getOpcode()) &&
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JumpAroundTarget->pred_size() == 1 &&
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JumpAroundTarget->succ_size() == 1;
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if (case1 || case2) {
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InvertAndChangeJumpTarget(MI, UncondTarget);
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MBB->removeSuccessor(JumpAroundTarget);
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MBB->addSuccessor(UncondTarget);
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// Remove the unconditional branch in LayoutSucc.
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LayoutSucc->erase(LayoutSucc->begin());
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LayoutSucc->removeSuccessor(UncondTarget);
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LayoutSucc->addSuccessor(JumpAroundTarget);
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// This code performs the conversion for case 2, which moves
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// the block to the fall-thru case (BB3 in the code above).
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if (case2 && !case1) {
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JumpAroundTarget->moveAfter(LayoutSucc);
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// only move a block if it doesn't have a fall-thru. otherwise
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// the CFG will be incorrect.
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if (!UncondTarget->canFallThrough()) {
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UncondTarget->moveAfter(JumpAroundTarget);
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}
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}
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//
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// Correct live-in information. Is used by post-RA scheduler
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// The live-in to LayoutSucc is now all values live-in to
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// JumpAroundTarget.
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//
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std::vector<unsigned> OrigLiveIn(LayoutSucc->livein_begin(),
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LayoutSucc->livein_end());
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std::vector<unsigned> NewLiveIn(JumpAroundTarget->livein_begin(),
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JumpAroundTarget->livein_end());
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for (unsigned i = 0; i < OrigLiveIn.size(); ++i) {
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LayoutSucc->removeLiveIn(OrigLiveIn[i]);
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}
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for (unsigned i = 0; i < NewLiveIn.size(); ++i) {
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LayoutSucc->addLiveIn(NewLiveIn[i]);
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}
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}
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}
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}
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}
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}
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}
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return true;
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}
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}
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//===----------------------------------------------------------------------===//
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// Public Constructor Functions
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//===----------------------------------------------------------------------===//
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static void initializePassOnce(PassRegistry &Registry) {
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PassInfo *PI = new PassInfo("Hexagon CFG Optimizer", "hexagon-cfg",
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&HexagonCFGOptimizer::ID, 0, false, false);
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Registry.registerPass(*PI, true);
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}
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void llvm::initializeHexagonCFGOptimizerPass(PassRegistry &Registry) {
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CALL_ONCE_INITIALIZATION(initializePassOnce)
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}
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FunctionPass *llvm::createHexagonCFGOptimizer(const HexagonTargetMachine &TM) {
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return new HexagonCFGOptimizer(TM);
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}
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