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49b9ed4bd9
llvm-mirror/test/MC/X86
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Reid Kleckner 49b9ed4bd9 X86 MC: Handle instructions like fxsave that match multiple operand sizes 
Instructions like 'fxsave' and control flow instructions like 'jne'
match any operand size. The loop I added to the Intel syntax matcher
assumed that using a different size would give a different instruction.
Now it handles the case where we get the same instruction for different
memory operand sizes.

This also allows us to remove the hack we had for unsized absolute
memory operands, because we can successfully match things like 'jnz'
without reporting ambiguity.  Removing this hack uncovered test case
involving 'fadd' that was ambiguous. The memory operand could have been
single or double precision.

llvm-svn: 216604
2014-08-27 20:10:38 +00:00
..
AlignedBundling Reduce verbiage of lit.local.cfg files 2014-06-09 22:42:55 +00:00
3DNow.s
2011-09-06-NoNewline.s
address-size.s [x86] Add basic support for .code16 2014-01-06 04:55:54 +00:00
avx512-encodings.s [SKX] Added new versions of cmp instructions in avx512_icmp_cc multiclass, added VL multiclass. 2014-08-27 09:34:37 +00:00
cfi_def_cfa-crash.s X86: Assembly files with .cfi_cfa_def shouldn't hit llvm_unreachable() 2013-11-08 22:33:06 +00:00
fde-reloc.s Move test since it depends on the X86 backend. 2013-03-28 17:01:28 +00:00
fixup-cpu-mode.s Tests for mode switching 2014-01-28 23:13:30 +00:00
gnux32-dwarf-gen.s Now that llvm-dwarfdump supports flags to specify which DWARF section to dump, 2013-01-25 21:44:53 +00:00
index-operations.s [x86] Allow segment and address-size overrides for INS[BWLQ] (PR9385) 2014-01-22 15:08:55 +00:00
intel-syntax-2.s MC X86: Accept ".att_syntax prefix" and diagnose noprefix 2014-08-06 23:21:13 +00:00
intel-syntax-ambiguous.s X86 MC: Handle instructions like fxsave that match multiple operand sizes 2014-08-27 20:10:38 +00:00
intel-syntax-avx512.s Teach X86 asm parser to understand 'ZMMWORD PTR' in Intel syntax. 2014-01-17 07:37:39 +00:00
intel-syntax-bitwise-ops.s Update the X86 assembler for .intel_syntax to accept 2014-02-06 01:21:15 +00:00
intel-syntax-directional-label.s Use printable names to implement directional labels. 2014-03-13 18:09:26 +00:00
intel-syntax-encoding.s Post process ADC/SBB and use a shorter encoding if they use a sign extended immediate. 2013-03-18 03:34:55 +00:00
intel-syntax-error.s Add missing test for r215031 2014-08-11 18:34:54 +00:00
intel-syntax-hex.s 'Hexadecimal' has two 'a's and only one 'i'. 2013-02-25 18:11:18 +00:00
intel-syntax-invalid-basereg.s Update the X86 assembler for .intel_syntax to produce an error for invalid base 2014-01-23 22:34:42 +00:00
intel-syntax-invalid-scale.s Update the X86 assembler for .intel_syntax to produce an error for invalid 2014-01-23 21:52:41 +00:00
intel-syntax-ptr-sized.s MC: Split the x86 asm matcher implementations by dialect 2014-08-26 20:32:34 +00:00
intel-syntax.s X86 MC: Handle instructions like fxsave that match multiple operand sizes 2014-08-27 20:10:38 +00:00
lit.local.cfg Reduce verbiage of lit.local.cfg files 2014-06-09 22:42:55 +00:00
macho-uleb.s Remove HasLEB128. 2014-08-15 14:01:07 +00:00
no-elf-compact-unwind.s Use compact unwind for the iOS simulator. 2014-06-20 22:40:55 +00:00
padlock.s Remove special FP opcode maps and instead add enough MRM_XX formats to handle all the FP operations. This increases format by 1 bit, but decreases opcode map by 1 bit so the TSFlags size doesn't change. 2014-02-19 08:25:02 +00:00
relax-insn.s [x86] Do not relax PUSHi16 to PUSHi32 (PR18414) 2014-01-08 12:58:32 +00:00
reloc-undef-global.s Look through variables when computing relocations. 2014-03-20 02:12:01 +00:00
ret.s [x86] Support i386-*-*-code16 triple for emitting 16-bit code 2014-01-20 12:02:25 +00:00
sgx-encoding.s Add support for the X86 secure guard extensions instructions in assembler (SGX). 2014-07-31 23:57:38 +00:00
shuffle-comments.s Merge SSE and AVX shuffle instructions in the comment printer. 2013-01-29 07:54:31 +00:00
stackmap-nops.ll [X86] Add comments to clarify some non-obvious lines in the stackmap-nops.ll 2014-07-25 04:50:08 +00:00
variant-diagnostics.s MC: fix test locations/name 2014-01-26 22:55:02 +00:00
x86_64-avx-clmul-encoding.s
x86_64-avx-encoding.s Move address override handling in X86MCCodeEmitter to a place where it works for VEX encoded instructions too. This allows 32-bit addressing to work in 64-bit mode. 2014-01-31 05:33:45 +00:00
x86_64-bmi-encoding.s
x86_64-encoding.s Allow pinsrw/pinsrb/pextrb/pextrw/movmskps/movmskpd/pmovmskb/extractps instructions to parse either GR32 or GR64 without resorting to duplicating instructions. 2013-10-14 04:55:01 +00:00
x86_64-fma3-encoding.s
x86_64-fma4-encoding.s Fix a bug in the calculation of the VEX.B bit for FMA4 rr with the VEX.W bit set. The VEX.B was being calculated from the wrong operand. Fixes at least some portion of PR14185. 2013-03-14 07:40:52 +00:00
x86_64-hle-encoding.s Add support for encoding the HLE XACQUIRE and XRELEASE prefixes. 2013-06-18 17:08:10 +00:00
x86_64-imm-widths.s
x86_64-rand-encoding.s Add support of RDSEED defined in AVX2 extension 2013-03-28 23:41:26 +00:00
x86_64-rtm-encoding.s x86 -- add the XTEST instruction 2013-03-25 18:59:43 +00:00
x86_64-signed-reloc.s [x86] Fix signed relocations for i64i32imm operands 2014-01-30 22:20:41 +00:00
x86_64-sse4a.s Add intrinsics, code gen, assembler and disassembler support for the SSE4a extrq and insertq instructions. 2012-05-29 19:05:25 +00:00
x86_64-tbm-encoding.s Move address override handling in X86MCCodeEmitter to a place where it works for VEX encoded instructions too. This allows 32-bit addressing to work in 64-bit mode. 2014-01-31 05:33:45 +00:00
x86_64-xop-encoding.s
x86_directives.s
x86_errors.s X86 MC: Reject invalid segment registers before a memory operand colon 2014-07-31 23:03:22 +00:00
x86_long_nop.s [X86] Limit maximum nop length on Silvermont 2014-07-04 07:14:56 +00:00
x86_nop.s [X86] Limit maximum nop length on Silvermont 2014-07-04 07:14:56 +00:00
x86_operands.s X86 MC: Don't crash on empty memory operand parens 2014-07-31 23:26:35 +00:00
x86-16.s [x86] Allow segment and address-size overrides for INS[BWLQ] (PR9385) 2014-01-22 15:08:55 +00:00
x86-32-avx.s Fix suffix handling for parsing and printing of cvtsi2ss, cvtsi2sd, cvtss2si, cvttss2si, cvtsd2si, and cvttsd2si to match gas behavior. 2013-01-06 20:39:29 +00:00
x86-32-coverage.s Add test cases for the various instruction alias and Intel syntax fixes that have gone in lately. 2013-07-26 05:39:33 +00:00
x86-32-fma3.s
x86-32-ms-inline-asm.s Revert r212375 because of test failures 2014-07-05 19:46:10 +00:00
x86-32.s [x86] Allow segment and address-size overrides for INS[BWLQ] (PR9385) 2014-01-22 15:08:55 +00:00
x86-64-avx512bw_vl.s [SKX] Added new versions of cmp instructions in avx512_icmp_cc multiclass, added VL multiclass. 2014-08-27 09:34:37 +00:00
x86-64-avx512bw.s [SKX] Added new versions of cmp instructions in avx512_icmp_cc multiclass, added VL multiclass. 2014-08-27 09:34:37 +00:00
x86-64-avx512dq.s [SKX] Enabling mask logic instructions: encoding, lowering 2014-07-28 13:46:45 +00:00
x86-64-avx512f_vl.s [SKX] Added new versions of cmp instructions in avx512_icmp_cc multiclass, added VL multiclass. 2014-08-27 09:34:37 +00:00
x86-64.s TableGen: use PrintMethods to print more aliases 2014-05-12 18:04:06 +00:00
x86-itanium.ll MC: fix MCAsmInfo usage for windows-itanium 2014-07-17 16:27:40 +00:00
x86-target-directives.s correct target directive handling error handling 2014-01-13 01:15:39 +00:00
x86-windows-itanium-libcalls.ll X86: correct library call setup for Windows itanium 2014-07-24 17:46:36 +00:00