mirror of
https://github.com/RPCS3/llvm-mirror.git
synced 2024-10-23 21:13:02 +02:00
26 lines
870 B
TableGen
26 lines
870 B
TableGen
//===-- VIInstructions.td - VI Instruction Defintions ---------------------===//
|
|
//
|
|
// The LLVM Compiler Infrastructure
|
|
//
|
|
// This file is distributed under the University of Illinois Open Source
|
|
// License. See LICENSE.TXT for details.
|
|
//
|
|
//===----------------------------------------------------------------------===//
|
|
// Instruction definitions for VI and newer.
|
|
//===----------------------------------------------------------------------===//
|
|
|
|
|
|
//===----------------------------------------------------------------------===//
|
|
// SMEM Patterns
|
|
//===----------------------------------------------------------------------===//
|
|
|
|
let Predicates = [isVI] in {
|
|
|
|
// 1. Offset as 20bit DWORD immediate
|
|
def : Pat <
|
|
(SIload_constant v4i32:$sbase, IMM20bit:$offset),
|
|
(S_BUFFER_LOAD_DWORD_IMM $sbase, (as_i32imm $offset))
|
|
>;
|
|
|
|
} // End Predicates = [isVI]
|