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https://github.com/RPCS3/llvm-mirror.git
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a4698bb735
There are a couple of bugs with the sc, scs, ll, lld instructions expanding: 1. On R6 these instruction pack immediate offset into a 9-bit field. Now if an immediate exceeds 9-bits assembler does not perform expansion and just rejects such instruction. 2. On 64-bit non-PIC code if an operand is a symbol assembler generates incorrect sequence of instructions. It uses R_MIPS_HI16 and R_MIPS_LO16 relocations and skips R_MIPS_HIGHEST and R_MIPS_HIGHER ones. To solve these problems this patch: - Introduces `mem_simm9_exp` to mark 9-bit memory immediate operands which require expansion. Probably later all `mem_simm9` operands will be able to migrate on `mem_simm9_exp` and we rename it to `mem_simm9`. - Adds new `OPERAND_MEM_SIMM9` operand type and assigns it to the `mem_simm9_exp`. That allows to know operand size in the `processInstruction` method and decide whether we need to expand instruction. - Adds `expandMem9Inst` method to expand instructions with 9-bit memory immediate operand. This method just load immediate into a "base" register used by origibal instruction: sc $2, 256($sp) => addiu $1, $sp, 256 sc $2, 0($1) - Fix `expandMem16Inst` to support a correct set of relocations for symbol loading in case of 64-bit non-PIC code. ll $12, symbol => lui $12, 0 R_MIPS_HIGHEST symbol daddiu $12, $12, 0 R_MIPS_HIGHER symbol dsll $12, $12, 16 daddiu $12, $12, 0 R_MIPS_HI16 symbol dsll $12, $12, 16 ll $12, 0($12) R_MIPS_LO16 symbol - Fix `expandMem16Inst` to unify handling of 3 and 4 operands instructions. - Delete unused now `MipsTargetStreamer::emitSCWithSymOffset` method. Task for next patches - implement expanding for other instructions use `mem_simm9` operand and other `mem_simm##` operands. Differential Revision: https://reviews.llvm.org/D70648
407 lines
16 KiB
ArmAsm
407 lines
16 KiB
ArmAsm
# RUN: llvm-mc -filetype=obj -triple mips -mcpu=mips2 %s -o - \
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# RUN: | llvm-objdump -d -r - | FileCheck %s --check-prefix=MIPS32
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# RUN: llvm-mc -filetype=obj -triple mips -mcpu=mips32 %s -o - \
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# RUN: | llvm-objdump -d -r - | FileCheck %s --check-prefix=MIPS32
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# RUN: llvm-mc -filetype=obj -triple mips -mcpu=mips32r2 %s -o - \
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# RUN: | llvm-objdump -d -r - | FileCheck %s --check-prefix=MIPS32
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# RUN: llvm-mc -filetype=obj -triple mipsn32 -mcpu=mips3 %s -o - \
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# RUN: | llvm-objdump -d -r - | FileCheck %s --check-prefix=MIPSN32
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# RUN: llvm-mc -filetype=obj -triple mipsn32 -mcpu=mips64r6 %s -o - \
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# RUN: | llvm-objdump -d -r - | FileCheck %s --check-prefix=MIPSN32R6
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# RUN: llvm-mc -filetype=obj -triple mips64 -mcpu=mips64 %s -o - \
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# RUN: | llvm-objdump -d -r - | FileCheck %s --check-prefix=MIPS64
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# RUN: llvm-mc -filetype=obj -triple mips64 -mcpu=mips64r2 %s -o - \
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# RUN: | llvm-objdump -d -r - | FileCheck %s --check-prefix=MIPS64
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# RUN: llvm-mc -filetype=obj -triple mips -mcpu=mips32r6 %s -o - \
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# RUN: | llvm-objdump -d -r - | FileCheck %s --check-prefix=MIPS32R6
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# RUN: llvm-mc -filetype=obj -triple mips64 -mcpu=mips64r6 %s -o - \
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# RUN: | llvm-objdump -d -r - | FileCheck %s --check-prefix=MIPS64R6
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ll $2, 128($sp)
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# MIPS32: c3 a2 00 80 ll $2, 128($sp)
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# MIPS32R6: 7f a2 40 36 ll $2, 128($sp)
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# MIPSN32: c3 a2 00 80 ll $2, 128($sp)
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# MIPSN32R6: 7f a2 40 36 ll $2, 128($sp)
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# MIPS64: c3 a2 00 80 ll $2, 128($sp)
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# MIPS64R6: 7f a2 40 36 ll $2, 128($sp)
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ll $2, -128($sp)
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# MIPS32: c3 a2 ff 80 ll $2, -128($sp)
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# MIPS32R6: 7f a2 c0 36 ll $2, -128($sp)
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# MIPSN32: c3 a2 ff 80 ll $2, -128($sp)
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# MIPSN32R6: 7f a2 c0 36 ll $2, -128($sp)
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# MIPS64: c3 a2 ff 80 ll $2, -128($sp)
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# MIPS64R6: 7f a2 c0 36 ll $2, -128($sp)
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ll $2, 256($sp)
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# MIPS32: c3 a2 01 00 ll $2, 256($sp)
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# MIPS32R6: 27 a2 01 00 addiu $2, $sp, 256
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# MIPS32R6-NEXT: 7c 42 00 36 ll $2, 0($2)
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# MIPSN32: c3 a2 01 00 ll $2, 256($sp)
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# MIPSN32R6: 27 a2 01 00 addiu $2, $sp, 256
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# MIPSN32R6-NEXT: 7c 42 00 36 ll $2, 0($2)
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# MIPS64: c3 a2 01 00 ll $2, 256($sp)
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# MIPS64R6: 67 a2 01 00 daddiu $2, $sp, 256
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# MIPS64R6-NEXT: 7c 42 00 36 ll $2, 0($2)
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ll $2, -257($sp)
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# MIPS32: c3 a2 fe ff ll $2, -257($sp)
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# MIPS32R6: 27 a2 fe ff addiu $2, $sp, -257
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# MIPS32R6-NEXT: 7c 42 00 36 ll $2, 0($2)
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# MIPSN32: c3 a2 fe ff ll $2, -257($sp)
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# MIPSN32R6: 27 a2 fe ff addiu $2, $sp, -257
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# MIPSN32R6-NEXT: 7c 42 00 36 ll $2, 0($2)
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# MIPS64: c3 a2 fe ff ll $2, -257($sp)
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# MIPS64R6: 67 a2 fe ff daddiu $2, $sp, -257
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# MIPS64R6-NEXT: 7c 42 00 36 ll $2, 0($2)
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ll $2, 32767($sp)
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# MIPS32: c3 a2 7f ff ll $2, 32767($sp)
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# MIPS32R6: 27 a2 7f ff addiu $2, $sp, 32767
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# MIPS32R6-NEXT: 7c 42 00 36 ll $2, 0($2)
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# MIPSN32: c3 a2 7f ff ll $2, 32767($sp)
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# MIPSN32R6: 27 a2 7f ff addiu $2, $sp, 32767
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# MIPSN32R6-NEXT: 7c 42 00 36 ll $2, 0($2)
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# MIPS64: c3 a2 7f ff ll $2, 32767($sp)
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# MIPS64R6: 67 a2 7f ff daddiu $2, $sp, 32767
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# MIPS64R6-NEXT: 7c 42 00 36 ll $2, 0($2)
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ll $2, 32768($sp)
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# MIPS32: 3c 02 00 01 lui $2, 1
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# MIPS32-NEXT: 00 5d 10 21 addu $2, $2, $sp
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# MIPS32-NEXT: c0 42 80 00 ll $2, -32768($2)
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# MIPS32R6: 34 02 80 00 ori $2, $zero, 32768
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# MIPS32R6-NEXT: 00 5d 10 21 addu $2, $2, $sp
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# MIPS32R6-NEXT: 7c 42 00 36 ll $2, 0($2)
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# MIPSN32: 3c 02 00 01 lui $2, 1
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# MIPSN32-NEXT: 00 5d 10 21 addu $2, $2, $sp
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# MIPSN32-NEXT: c0 42 80 00 ll $2, -32768($2)
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# MIPSN32R6: 34 02 80 00 ori $2, $zero, 32768
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# MIPSN32R6-NEXT: 00 5d 10 21 addu $2, $2, $sp
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# MIPSN32R6-NEXT: 7c 42 00 36 ll $2, 0($2)
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# MIPS64: 3c 02 00 01 lui $2, 1
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# MIPS64-NEXT: 00 5d 10 2d daddu $2, $2, $sp
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# MIPS64-NEXT: c0 42 80 00 ll $2, -32768($2)
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# MIPS64R6: 34 02 80 00 ori $2, $zero, 32768
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# MIPS64R6-NEXT: 00 5d 10 2d daddu $2, $2, $sp
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# MIPS64R6-NEXT: 7c 42 00 36 ll $2, 0($2)
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ll $2, -32768($sp)
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# MIPS32: c3 a2 80 00 ll $2, -32768($sp)
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# MIPS32R6: 27 a2 80 00 addiu $2, $sp, -32768
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# MIPS32R6-NEXT: 7c 42 00 36 ll $2, 0($2)
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# MIPSN32: c3 a2 80 00 ll $2, -32768($sp)
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# MIPSN32R6: 27 a2 80 00 addiu $2, $sp, -32768
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# MIPSN32R6-NEXT: 7c 42 00 36 ll $2, 0($2)
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# MIPS64: c3 a2 80 00 ll $2, -32768($sp)
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# MIPS64R6: 67 a2 80 00 daddiu $2, $sp, -32768
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# MIPS64R6-NEXT: 7c 42 00 36 ll $2, 0($2)
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ll $2, -32769($sp)
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# MIPS32: 3c 02 ff ff lui $2, 65535
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# MIPS32-NEXT: 00 5d 10 21 addu $2, $2, $sp
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# MIPS32-NEXT: c0 42 7f ff ll $2, 32767($2)
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# MIPS32R6: 3c 02 ff ff aui $2, $zero, 65535
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# MIPS32R6-NEXT: 34 42 7f ff ori $2, $2, 32767
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# MIPS32R6-NEXT: 00 5d 10 21 addu $2, $2, $sp
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# MIPS32R6-NEXT: 7c 42 00 36 ll $2, 0($2)
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# MIPSN32: 3c 02 ff ff lui $2, 65535
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# MIPSN32-NEXT: 00 5d 10 21 addu $2, $2, $sp
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# MIPSN32-NEXT: c0 42 7f ff ll $2, 32767($2)
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# MIPSN32R6: 3c 02 ff ff aui $2, $zero, 65535
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# MIPSN32R6-NEXT: 34 42 7f ff ori $2, $2, 32767
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# MIPSN32R6-NEXT: 00 5d 10 21 addu $2, $2, $sp
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# MIPSN32R6-NEXT: 7c 42 00 36 ll $2, 0($2)
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# MIPS64: 3c 02 ff ff lui $2, 65535
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# MIPS64-NEXT: 00 5d 10 2d daddu $2, $2, $sp
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# MIPS64-NEXT: c0 42 7f ff ll $2, 32767($2)
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# MIPS64R6: 3c 02 ff ff aui $2, $zero, 65535
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# MIPS64R6-NEXT: 34 42 7f ff ori $2, $2, 32767
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# MIPS64R6-NEXT: 00 5d 10 2d daddu $2, $2, $sp
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# MIPS64R6-NEXT: 7c 42 00 36 ll $2, 0($2)
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ll $2, 655987($sp)
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# MIPS32: 3c 02 00 0a lui $2, 10
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# MIPS32-NEXT: 00 5d 10 21 addu $2, $2, $sp
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# MIPS32-NEXT: c0 42 02 73 ll $2, 627($2)
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# MIPS32R6: 3c 02 00 0a aui $2, $zero, 10
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# MIPS32R6-NEXT: 34 42 02 73 ori $2, $2, 627
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# MIPS32R6-NEXT: 00 5d 10 21 addu $2, $2, $sp
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# MIPS32R6-NEXT: 7c 42 00 36 ll $2, 0($2)
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# MIPSN32: 3c 02 00 0a lui $2, 10
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# MIPSN32-NEXT: 00 5d 10 21 addu $2, $2, $sp
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# MIPSN32-NEXT: c0 42 02 73 ll $2, 627($2)
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# MIPSN32R6: 3c 02 00 0a aui $2, $zero, 10
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# MIPSN32R6-NEXT: 34 42 02 73 ori $2, $2, 627
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# MIPSN32R6-NEXT: 00 5d 10 21 addu $2, $2, $sp
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# MIPSN32R6-NEXT: 7c 42 00 36 ll $2, 0($2)
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# MIPS64: 3c 02 00 0a lui $2, 10
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# MIPS64-NEXT: 00 5d 10 2d daddu $2, $2, $sp
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# MIPS64-NEXT: c0 42 02 73 ll $2, 627($2)
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# MIPS64R6: 3c 02 00 0a aui $2, $zero, 10
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# MIPS64R6-NEXT: 34 42 02 73 ori $2, $2, 627
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# MIPS64R6-NEXT: 00 5d 10 2d daddu $2, $2, $sp
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# MIPS64R6-NEXT: 7c 42 00 36 ll $2, 0($2)
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ll $2, -655987($sp)
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# MIPS32: 3c 02 ff f6 lui $2, 65526
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# MIPS32-NEXT: 00 5d 10 21 addu $2, $2, $sp
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# MIPS32-NEXT: c0 42 fd 8d ll $2, -627($2)
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# MIPS32R6: 3c 02 ff f5 aui $2, $zero, 65525
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# MIPS32R6-NEXT: 34 42 fd 8d ori $2, $2, 64909
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# MIPS32R6-NEXT: 00 5d 10 21 addu $2, $2, $sp
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# MIPS32R6-NEXT: 7c 42 00 36 ll $2, 0($2)
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# MIPSN32: 3c 02 ff f6 lui $2, 65526
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# MIPSN32-NEXT: 00 5d 10 21 addu $2, $2, $sp
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# MIPSN32-NEXT: c0 42 fd 8d ll $2, -627($2)
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# MIPSN32R6: 3c 02 ff f5 aui $2, $zero, 65525
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# MIPSN32R6-NEXT: 34 42 fd 8d ori $2, $2, 64909
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# MIPSN32R6-NEXT: 00 5d 10 21 addu $2, $2, $sp
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# MIPSN32R6-NEXT: 7c 42 00 36 ll $2, 0($2)
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# MIPS64: 3c 02 ff f6 lui $2, 65526
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# MIPS64-NEXT: 00 5d 10 2d daddu $2, $2, $sp
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# MIPS64-NEXT: c0 42 fd 8d ll $2, -627($2)
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# MIPS64R6: 3c 02 ff f5 aui $2, $zero, 65525
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# MIPS64R6-NEXT: 34 42 fd 8d ori $2, $2, 64909
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# MIPS64R6-NEXT: 00 5d 10 2d daddu $2, $2, $sp
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# MIPS64R6-NEXT: 7c 42 00 36 ll $2, 0($2)
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ll $12, symbol
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# MIPS32: 3c 0c 00 00 lui $12, 0
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# MIPS32-NEXT: R_MIPS_HI16 symbol
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# MIPS32-NEXT: c1 8c 00 00 ll $12, 0($12)
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# MIPS32-NEXT: R_MIPS_LO16 symbol
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# MIPS32R6: 3c 0c 00 00 aui $12, $zero, 0
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# MIPS32R6-NEXT: R_MIPS_HI16 symbol
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# MIPS32R6-NEXT: 25 8c 00 00 addiu $12, $12, 0
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# MIPS32R6-NEXT: R_MIPS_LO16 symbol
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# MIPS32R6-NEXT: 7d 8c 00 36 ll $12, 0($12)
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# MIPSN32: 3c 0c 00 00 lui $12, 0
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# MIPSN32-NEXT: R_MIPS_HI16 symbol
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# MIPSN32-NEXT: c1 8c 00 00 ll $12, 0($12)
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# MIPSN32-NEXT: R_MIPS_LO16 symbol
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# MIPSN32R6: 3c 0c 00 00 aui $12, $zero, 0
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# MIPSN32R6-NEXT: R_MIPS_HI16 symbol
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# MIPSN32R6-NEXT: 25 8c 00 00 addiu $12, $12, 0
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# MIPSN32R6-NEXT: R_MIPS_LO16 symbol
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# MIPSN32R6-NEXT: 7d 8c 00 36 ll $12, 0($12)
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# MIPS64: 3c 0c 00 00 lui $12, 0
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# MIPS64-NEXT: R_MIPS_HIGHEST/R_MIPS_NONE/R_MIPS_NONE symbol
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# MIPS64-NEXT: 65 8c 00 00 daddiu $12, $12, 0
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# MIPS64-NEXT: R_MIPS_HIGHER/R_MIPS_NONE/R_MIPS_NONE symbol
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# MIPS64-NEXT: 00 0c 64 38 dsll $12, $12, 16
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# MIPS64-NEXT: 65 8c 00 00 daddiu $12, $12, 0
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# MIPS64-NEXT: R_MIPS_HI16/R_MIPS_NONE/R_MIPS_NONE symbol
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# MIPS64-NEXT: 00 0c 64 38 dsll $12, $12, 16
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# MIPS64-NEXT: c1 8c 00 00 ll $12, 0($12)
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# MIPS64-NEXT: R_MIPS_LO16/R_MIPS_NONE/R_MIPS_NONE symbol
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# MIPS64R6: 3c 0c 00 00 aui $12, $zero, 0
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# MIPS64R6-NEXT: R_MIPS_HIGHEST/R_MIPS_NONE/R_MIPS_NONE symbol
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# MIPS64R6-NEXT: 3c 01 00 00 aui $1, $zero, 0
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# MIPS64R6-NEXT: R_MIPS_HI16/R_MIPS_NONE/R_MIPS_NONE symbol
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# MIPS64R6-NEXT: 65 8c 00 00 daddiu $12, $12, 0
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# MIPS64R6-NEXT: R_MIPS_HIGHER/R_MIPS_NONE/R_MIPS_NONE symbol
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# MIPS64R6-NEXT: 64 21 00 00 daddiu $1, $1, 0
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# MIPS64R6-NEXT: R_MIPS_LO16/R_MIPS_NONE/R_MIPS_NONE symbol
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# MIPS64R6-NEXT: 00 0c 60 3c dsll32 $12, $12, 0
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# MIPS64R6-NEXT: 01 81 60 2d daddu $12, $12, $1
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# MIPS64R6-NEXT: 7d 8c 00 36 ll $12, 0($12)
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ll $12, symbol($3)
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# MIPS32: 3c 0c 00 00 lui $12, 0
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# MIPS32-NEXT: R_MIPS_HI16 symbol
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# MIPS32-NEXT: 01 83 60 21 addu $12, $12, $3
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# MIPS32-NEXT: c1 8c 00 00 ll $12, 0($12)
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# MIPS32-NEXT: R_MIPS_LO16 symbol
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# MIPS32R6: 3c 0c 00 00 aui $12, $zero, 0
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# MIPS32R6-NEXT: R_MIPS_HI16 symbol
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# MIPS32R6-NEXT: 25 8c 00 00 addiu $12, $12, 0
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# MIPS32R6-NEXT: R_MIPS_LO16 symbol
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# MIPS32R6-NEXT: 01 83 60 21 addu $12, $12, $3
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# MIPS32R6-NEXT: 7d 8c 00 36 ll $12, 0($12)
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# MIPSN32: 3c 0c 00 00 lui $12, 0
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# MIPSN32-NEXT: R_MIPS_HI16 symbol
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# MIPSN32-NEXT: 01 83 60 21 addu $12, $12, $3
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# MIPSN32-NEXT: c1 8c 00 00 ll $12, 0($12)
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# MIPSN32-NEXT: R_MIPS_LO16 symbol
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# MIPSN32R6: 3c 0c 00 00 aui $12, $zero, 0
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# MIPSN32R6-NEXT: R_MIPS_HI16 symbol
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# MIPSN32R6-NEXT: 25 8c 00 00 addiu $12, $12, 0
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# MIPSN32R6-NEXT: R_MIPS_LO16 symbol
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# MIPSN32R6-NEXT: 01 83 60 21 addu $12, $12, $3
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# MIPSN32R6-NEXT: 7d 8c 00 36 ll $12, 0($12)
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# MIPS64: 3c 0c 00 00 lui $12, 0
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# MIPS64-NEXT: R_MIPS_HIGHEST/R_MIPS_NONE/R_MIPS_NONE symbol
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# MIPS64-NEXT: 65 8c 00 00 daddiu $12, $12, 0
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# MIPS64-NEXT: R_MIPS_HIGHER/R_MIPS_NONE/R_MIPS_NONE symbol
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# MIPS64-NEXT: 00 0c 64 38 dsll $12, $12, 16
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# MIPS64-NEXT: 65 8c 00 00 daddiu $12, $12, 0
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# MIPS64-NEXT: R_MIPS_HI16/R_MIPS_NONE/R_MIPS_NONE symbol
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# MIPS64-NEXT: 00 0c 64 38 dsll $12, $12, 16
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# MIPS64-NEXT: 01 83 60 2d daddu $12, $12, $3
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# MIPS64-NEXT: c1 8c 00 00 ll $12, 0($12)
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# MIPS64-NEXT: R_MIPS_LO16/R_MIPS_NONE/R_MIPS_NONE symbol
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# MIPS64R6: 3c 0c 00 00 aui $12, $zero, 0
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# MIPS64R6-NEXT: R_MIPS_HIGHEST/R_MIPS_NONE/R_MIPS_NONE symbol
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# MIPS64R6-NEXT: 3c 01 00 00 aui $1, $zero, 0
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# MIPS64R6-NEXT: R_MIPS_HI16/R_MIPS_NONE/R_MIPS_NONE symbol
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# MIPS64R6-NEXT: 65 8c 00 00 daddiu $12, $12, 0
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# MIPS64R6-NEXT: R_MIPS_HIGHER/R_MIPS_NONE/R_MIPS_NONE symbol
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# MIPS64R6-NEXT: 64 21 00 00 daddiu $1, $1, 0
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# MIPS64R6-NEXT: R_MIPS_LO16/R_MIPS_NONE/R_MIPS_NONE symbol
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# MIPS64R6-NEXT: 00 0c 60 3c dsll32 $12, $12, 0
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# MIPS64R6-NEXT: 01 81 60 2d daddu $12, $12, $1
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# MIPS64R6-NEXT: 01 83 60 2d daddu $12, $12, $3
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# MIPS64R6-NEXT: 7d 8c 00 36 ll $12, 0($12)
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|
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ll $12, symbol+8
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# MIPS32: 3c 0c 00 00 lui $12, 0
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# MIPS32-NEXT: R_MIPS_HI16 symbol
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# MIPS32-NEXT: c1 8c 00 08 ll $12, 8($12)
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# MIPS32-NEXT: R_MIPS_LO16 symbol
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# MIPS32R6: 3c 0c 00 00 aui $12, $zero, 0
|
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# MIPS32R6-NEXT: R_MIPS_HI16 symbol
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# MIPS32R6-NEXT: 25 8c 00 08 addiu $12, $12, 8
|
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# MIPS32R6-NEXT: R_MIPS_LO16 symbol
|
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# MIPS32R6-NEXT: 7d 8c 00 36 ll $12, 0($12)
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# MIPSN32: 3c 0c 00 00 lui $12, 0
|
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# MIPSN32-NEXT: R_MIPS_HI16 symbol+0x8
|
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# MIPSN32-NEXT: c1 8c 00 00 ll $12, 0($12)
|
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# MIPSN32-NEXT: R_MIPS_LO16 symbol+0x8
|
|
|
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# MIPSN32R6: 3c 0c 00 00 aui $12, $zero, 0
|
|
# MIPSN32R6-NEXT: R_MIPS_HI16 symbol+0x8
|
|
# MIPSN32R6-NEXT: 25 8c 00 00 addiu $12, $12, 0
|
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# MIPSN32R6-NEXT: R_MIPS_LO16 symbol+0x8
|
|
# MIPSN32R6-NEXT: 7d 8c 00 36 ll $12, 0($12)
|
|
|
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# MIPS64: 3c 0c 00 00 lui $12, 0
|
|
# MIPS64-NEXT: R_MIPS_HIGHEST/R_MIPS_NONE/R_MIPS_NONE symbol+0x8
|
|
# MIPS64-NEXT: 65 8c 00 00 daddiu $12, $12, 0
|
|
# MIPS64-NEXT: R_MIPS_HIGHER/R_MIPS_NONE/R_MIPS_NONE symbol+0x8
|
|
# MIPS64-NEXT: 00 0c 64 38 dsll $12, $12, 16
|
|
# MIPS64-NEXT: 65 8c 00 00 daddiu $12, $12, 0
|
|
# MIPS64-NEXT: R_MIPS_HI16/R_MIPS_NONE/R_MIPS_NONE symbol+0x8
|
|
# MIPS64-NEXT: 00 0c 64 38 dsll $12, $12, 16
|
|
# MIPS64-NEXT: c1 8c 00 00 ll $12, 0($12)
|
|
# MIPS64-NEXT: R_MIPS_LO16/R_MIPS_NONE/R_MIPS_NONE symbol+0x8
|
|
|
|
# MIPS64R6: 3c 0c 00 00 aui $12, $zero, 0
|
|
# MIPS64R6-NEXT: R_MIPS_HIGHEST/R_MIPS_NONE/R_MIPS_NONE symbol+0x8
|
|
# MIPS64R6-NEXT: 3c 01 00 00 aui $1, $zero, 0
|
|
# MIPS64R6-NEXT: R_MIPS_HI16/R_MIPS_NONE/R_MIPS_NONE symbol+0x8
|
|
# MIPS64R6-NEXT: 65 8c 00 00 daddiu $12, $12, 0
|
|
# MIPS64R6-NEXT: R_MIPS_HIGHER/R_MIPS_NONE/R_MIPS_NONE symbol+0x8
|
|
# MIPS64R6-NEXT: 64 21 00 00 daddiu $1, $1, 0
|
|
# MIPS64R6-NEXT: R_MIPS_LO16/R_MIPS_NONE/R_MIPS_NONE symbol+0x8
|
|
# MIPS64R6-NEXT: 00 0c 60 3c dsll32 $12, $12, 0
|
|
# MIPS64R6-NEXT: 01 81 60 2d daddu $12, $12, $1
|
|
# MIPS64R6-NEXT: 7d 8c 00 36 ll $12, 0($12)
|
|
|
|
.option pic2
|
|
|
|
ll $12, symbol
|
|
# MIPS32: 8f 8c 00 00 lw $12, 0($gp)
|
|
# MIPS32-NEXT: R_MIPS_GOT16 symbol
|
|
# MIPS32-NEXT: c1 8c 00 00 ll $12, 0($12)
|
|
|
|
# MIPS32R6: 8f 8c 00 00 lw $12, 0($gp)
|
|
# MIPS32R6-NEXT: R_MIPS_GOT16 symbol
|
|
# MIPS32R6-NEXT: 7d 8c 00 36 ll $12, 0($12)
|
|
|
|
# MIPSN32: 8f 8c 00 00 lw $12, 0($gp)
|
|
# MIPSN32-NEXT: R_MIPS_GOT_DISP symbol
|
|
# MIPSN32-NEXT: c1 8c 00 00 ll $12, 0($12)
|
|
|
|
# MIPSN32R6: 8f 8c 00 00 lw $12, 0($gp)
|
|
# MIPSN32R6-NEXT: R_MIPS_GOT_DISP symbol
|
|
# MIPSN32R6-NEXT: 7d 8c 00 36 ll $12, 0($12)
|
|
|
|
# MIPS64: df 8c 00 00 ld $12, 0($gp)
|
|
# MIPS64-NEXT: R_MIPS_GOT_DISP/R_MIPS_NONE/R_MIPS_NONE symbol
|
|
# MIPS64-NEXT: c1 8c 00 00 ll $12, 0($12)
|
|
|
|
# MIPS64R6: df 8c 00 00 ld $12, 0($gp)
|
|
# MIPS64R6-NEXT: R_MIPS_GOT_DISP/R_MIPS_NONE/R_MIPS_NONE symbol
|
|
# MIPS64R6-NEXT: 7d 8c 00 36 ll $12, 0($12)
|
|
|
|
ll $12, symbol+8
|
|
# MIPS32: 8f 8c 00 00 lw $12, 0($gp)
|
|
# MIPS32-NEXT: R_MIPS_GOT16 symbol
|
|
# MIPS32-NEXT: c1 8c 00 08 ll $12, 8($12)
|
|
|
|
# MIPS32R6: 8f 8c 00 00 lw $12, 0($gp)
|
|
# MIPS32R6-NEXT: R_MIPS_GOT16 symbol
|
|
# MIPS32R6-NEXT: 25 8c 00 08 addiu $12, $12, 8
|
|
# MIPS32R6-NEXT: 7d 8c 00 36 ll $12, 0($12)
|
|
|
|
# MIPSN32: 8f 8c 00 00 lw $12, 0($gp)
|
|
# MIPSN32-NEXT: R_MIPS_GOT_DISP symbol
|
|
# MIPSN32-NEXT: c1 8c 00 08 ll $12, 8($12)
|
|
|
|
# MIPSN32R6: 8f 8c 00 00 lw $12, 0($gp)
|
|
# MIPSN32R6-NEXT: R_MIPS_GOT_DISP symbol
|
|
# MIPSN32R6-NEXT: 25 8c 00 08 addiu $12, $12, 8
|
|
# MIPSN32R6-NEXT: 7d 8c 00 36 ll $12, 0($12)
|
|
|
|
# MIPS64: df 8c 00 00 ld $12, 0($gp)
|
|
# MIPS64-NEXT: R_MIPS_GOT_DISP/R_MIPS_NONE/R_MIPS_NONE symbol
|
|
# MIPS64-NEXT: c1 8c 00 08 ll $12, 8($12)
|
|
|
|
# MIPS64R6: df 8c 00 00 ld $12, 0($gp)
|
|
# MIPS64R6-NEXT: R_MIPS_GOT_DISP/R_MIPS_NONE/R_MIPS_NONE symbol
|
|
# MIPS64R6-NEXT: 65 8c 00 08 daddiu $12, $12, 8
|
|
# MIPS64R6-NEXT: 7d 8c 00 36 ll $12, 0($12)
|