Simon Pilgrim 4a581314fe Revert rL342916: [X86] Remove shift/rotate by CL memory (RMW) overrides ... As suggested by Craig Topper - I'm going to look at cleaning up the RMW sequences instead. The uops are slightly different to the register variant, so requires a +1uop tweak llvm-svn: 342969		2018-09-25 13:01:26 +00:00
..
Analysis
Assembler	[test] Fix Assembler/debug-info.ll	2018-09-21 12:28:44 +00:00
Bindings
Bitcode	Fix some missing opcodes in bcanalyzer	2018-09-24 12:47:17 +00:00
BugPoint
CodeGen	Revert rL342916: [X86] Remove shift/rotate by CL memory (RMW) overrides	2018-09-25 13:01:26 +00:00
DebugInfo	[DebugInfo] Do not generate address info for removed debug labels.	2018-09-25 06:09:50 +00:00
Demangle
Examples
ExecutionEngine
Feature
FileCheck
Instrumentation	[hwasan] Record and display stack history in stack-based reports.	2018-09-24 23:03:34 +00:00
Integer
JitListener
Linker	Fix asserts when linking wrong address space declarations	2018-09-24 04:42:14 +00:00
LTO	Pass code-model through Module IR to LTO which will use it.	2018-09-21 18:41:31 +00:00
MC	[WebAssembly] SIMD sqrt	2018-09-25 03:39:28 +00:00
Object
ObjectYAML
Other	[New PM][PassInstrumentation] IR printing support for New Pass Manager	2018-09-24 16:08:15 +00:00
SafepointIRVerifier
SymbolRewriter
TableGen
ThinLTO/X86	[ThinLTO] Write TYPE_IDs for types used in functions imported by aliases	2018-09-19 18:51:42 +00:00
tools	Revert rL342916: [X86] Remove shift/rotate by CL memory (RMW) overrides	2018-09-25 13:01:26 +00:00
Transforms	[LoopUnroll] Add check to Latch's terminator in UnrollRuntimeLoopRemainder	2018-09-25 10:08:47 +00:00
Unit
Verifier
YAMLParser
.clang-format
CMakeLists.txt	Revert rL342953 "[llvm-exegesis] Add lit tests."	2018-09-25 09:36:44 +00:00
lit.cfg.py	Revert rL342953 "[llvm-exegesis] Add lit tests."	2018-09-25 09:36:44 +00:00
lit.site.cfg.py.in
TestRunner.sh