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https://github.com/RPCS3/llvm-mirror.git
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eb82c3743a
llvm-svn: 84431
90 lines
3.1 KiB
LLVM
90 lines
3.1 KiB
LLVM
; RUN: llc < %s -march=x86 -post-RA-scheduler=false | FileCheck %s
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; rdar://7226797
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; LLVM should omit the testl and use the flags result from the orl.
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; CHECK: or:
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define void @or(float* %A, i32 %IA, i32 %N) nounwind {
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entry:
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%0 = ptrtoint float* %A to i32 ; <i32> [#uses=1]
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%1 = and i32 %0, 3 ; <i32> [#uses=1]
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%2 = xor i32 %IA, 1 ; <i32> [#uses=1]
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; CHECK: orl %ecx, %edx
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; CHECK-NEXT: je
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%3 = or i32 %2, %1 ; <i32> [#uses=1]
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%4 = icmp eq i32 %3, 0 ; <i1> [#uses=1]
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br i1 %4, label %return, label %bb
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bb: ; preds = %entry
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store float 0.000000e+00, float* %A, align 4
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ret void
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return: ; preds = %entry
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ret void
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}
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; CHECK: xor:
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define void @xor(float* %A, i32 %IA, i32 %N) nounwind {
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entry:
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%0 = ptrtoint float* %A to i32 ; <i32> [#uses=1]
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%1 = and i32 %0, 3 ; <i32> [#uses=1]
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; CHECK: xorl $1, %e
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; CHECK-NEXT: je
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%2 = xor i32 %IA, 1 ; <i32> [#uses=1]
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%3 = xor i32 %2, %1 ; <i32> [#uses=1]
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%4 = icmp eq i32 %3, 0 ; <i1> [#uses=1]
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br i1 %4, label %return, label %bb
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bb: ; preds = %entry
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store float 0.000000e+00, float* %A, align 4
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ret void
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return: ; preds = %entry
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ret void
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}
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; CHECK: and:
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define void @and(float* %A, i32 %IA, i32 %N, i8* %p) nounwind {
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entry:
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store i8 0, i8* %p
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%0 = ptrtoint float* %A to i32 ; <i32> [#uses=1]
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%1 = and i32 %0, 3 ; <i32> [#uses=1]
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%2 = xor i32 %IA, 1 ; <i32> [#uses=1]
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; CHECK: andl $3, %
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; CHECK-NEXT: movb %
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; CHECK-NEXT: je
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%3 = and i32 %2, %1 ; <i32> [#uses=1]
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%t = trunc i32 %3 to i8
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store i8 %t, i8* %p
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%4 = icmp eq i32 %3, 0 ; <i1> [#uses=1]
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br i1 %4, label %return, label %bb
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bb: ; preds = %entry
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store float 0.000000e+00, float* null, align 4
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ret void
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return: ; preds = %entry
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ret void
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}
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; Just like @and, but without the trunc+store. This should use a testl
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; instead of an andl.
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; CHECK: test:
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define void @test(float* %A, i32 %IA, i32 %N, i8* %p) nounwind {
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entry:
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store i8 0, i8* %p
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%0 = ptrtoint float* %A to i32 ; <i32> [#uses=1]
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%1 = and i32 %0, 3 ; <i32> [#uses=1]
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%2 = xor i32 %IA, 1 ; <i32> [#uses=1]
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; CHECK: testb $3, %
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; CHECK-NEXT: je
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%3 = and i32 %2, %1 ; <i32> [#uses=1]
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%4 = icmp eq i32 %3, 0 ; <i1> [#uses=1]
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br i1 %4, label %return, label %bb
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bb: ; preds = %entry
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store float 0.000000e+00, float* null, align 4
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ret void
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return: ; preds = %entry
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ret void
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}
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