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277138a332
This is causing compilation timeouts on code with long sequences of local values and calls (i.e. foo(1); foo(2); foo(3); ...). It turns out that code coverage instrumentation is a great way to create sequences like this, which how our users ran into the issue in practice. Intel has a tool that detects these kinds of non-linear compile time issues, and Andy Kaylor reported it as PR37010. The current sinking code scans the whole basic block once per local value sink, which happens before emitting each call. In theory, local values should only be introduced to be used by instructions between the current flush point and the last flush point, so we should only need to scan those instructions. llvm-svn: 329822
97 lines
2.5 KiB
LLVM
97 lines
2.5 KiB
LLVM
; RUN: llc -fast-isel-sink-local-values < %s -O0 -verify-machineinstrs -fast-isel-abort=1 -relocation-model=dynamic-no-pic -mtriple=armv7-apple-ios | FileCheck %s --check-prefix=ARM
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; RUN: llc -fast-isel-sink-local-values < %s -O0 -verify-machineinstrs -fast-isel-abort=1 -relocation-model=dynamic-no-pic -mtriple=armv7-linux-gnueabi | FileCheck %s --check-prefix=ARM
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; RUN: llc -fast-isel-sink-local-values < %s -O0 -verify-machineinstrs -fast-isel-abort=1 -relocation-model=dynamic-no-pic -mtriple=thumbv7-apple-ios | FileCheck %s --check-prefix=THUMB
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; RUN: llc -fast-isel-sink-local-values < %s -O0 -fast-isel-abort=1 -relocation-model=dynamic-no-pic -mtriple=thumbv8-apple-ios | FileCheck %s --check-prefix=THUMB
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define i32 @t1(i1 %c) nounwind readnone {
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entry:
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; ARM: t1
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; ARM: tst r0, #1
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; ARM: movw r0, #10
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; ARM: moveq r0, #20
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; THUMB: t1
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; THUMB: tst.w r0, #1
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; THUMB: movw r0, #10
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; THUMB: it eq
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; THUMB: moveq r0, #20
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%0 = select i1 %c, i32 10, i32 20
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ret i32 %0
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}
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define i32 @t2(i1 %c, i32 %a) nounwind readnone {
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entry:
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; ARM: t2
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; ARM: tst r0, #1
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; ARM: moveq r{{[1-9]}}, #20
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; ARM: mov r0, r{{[1-9]}}
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; THUMB-LABEL: t2
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; THUMB: tst.w r0, #1
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; THUMB: it eq
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; THUMB: moveq r{{[1-9]}}, #20
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; THUMB: mov r0, r{{[1-9]}}
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%0 = select i1 %c, i32 %a, i32 20
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ret i32 %0
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}
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define i32 @t3(i1 %c, i32 %a, i32 %b) nounwind readnone {
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entry:
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; ARM: t3
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; ARM: tst r0, #1
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; ARM: movne r2, r1
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; ARM: add r0, r2, r1
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; THUMB: t3
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; THUMB: tst.w r0, #1
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; THUMB: it ne
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; THUMB: movne r2, r1
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; THUMB: add.w r0, r2, r1
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%0 = select i1 %c, i32 %a, i32 %b
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%1 = add i32 %0, %a
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ret i32 %1
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}
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define i32 @t4(i1 %c) nounwind readnone {
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entry:
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; ARM: t4
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; ARM: tst r0, #1
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; ARM: mvn r0, #9
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; ARM: mvneq r0, #0
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; THUMB-LABEL: t4
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; THUMB: tst.w r0, #1
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; THUMB: mvn r0, #9
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; THUMB: it eq
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; THUMB: mvneq r0, #0
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%0 = select i1 %c, i32 -10, i32 -1
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ret i32 %0
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}
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define i32 @t5(i1 %c, i32 %a) nounwind readnone {
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entry:
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; ARM: t5
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; ARM: tst r0, #1
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; ARM: mvneq r{{[1-9]}}, #1
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; ARM: mov r0, r{{[1-9]}}
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; THUMB: t5
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; THUMB: tst.w r0, #1
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; THUMB: it eq
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; THUMB: mvneq r{{[1-9]}}, #1
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; THUMB: mov r0, r{{[1-9]}}
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%0 = select i1 %c, i32 %a, i32 -2
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ret i32 %0
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}
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; Check one large negative immediates.
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define i32 @t6(i1 %c, i32 %a) nounwind readnone {
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entry:
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; ARM: t6
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; ARM: tst r0, #1
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; ARM: mvneq r{{[1-9]}}, #978944
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; ARM: mov r0, r{{[1-9]}}
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; THUMB: t6
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; THUMB: tst.w r0, #1
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; THUMB: it eq
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; THUMB: mvneq r{{[1-9]}}, #978944
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; THUMB: mov r0, r{{[1-9]}}
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%0 = select i1 %c, i32 %a, i32 -978945
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ret i32 %0
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}
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