mirror of
https://github.com/RPCS3/llvm-mirror.git
synced 2024-10-31 07:52:55 +01:00
030e941124
SltCCRxRy16, SltiCCRxImmX16, SltiuCCRxImmX16, SltuCCRxRy16 $T8 shows up as register $24 when emitted from C++ code so we had to change some tests that were already there for this functionality. llvm-svn: 175593
22 lines
583 B
LLVM
22 lines
583 B
LLVM
; RUN: llc -march=mipsel -mcpu=mips16 -relocation-model=pic -O3 < %s | FileCheck %s -check-prefix=16
|
|
|
|
@i = global i32 1, align 4
|
|
@j = global i32 10, align 4
|
|
@k = global i32 1, align 4
|
|
@r1 = common global i32 0, align 4
|
|
@r2 = common global i32 0, align 4
|
|
|
|
define void @test() nounwind {
|
|
entry:
|
|
%0 = load i32* @i, align 4
|
|
%1 = load i32* @k, align 4
|
|
%cmp = icmp eq i32 %0, %1
|
|
%conv = zext i1 %cmp to i32
|
|
store i32 %conv, i32* @r1, align 4
|
|
; 16: xor $[[REGISTER:[0-9A-Ba-b_]+]], ${{[0-9]+}}
|
|
; 16: sltiu $[[REGISTER:[0-9A-Ba-b_]+]], 1
|
|
; 16: move ${{[0-9]+}}, $24
|
|
ret void
|
|
}
|
|
|