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987e271aaa
Extend r187495 to conditional loads. I split this out because the easiest way seemed to be to force a particular operand order in SystemZISelDAGToDAG.cpp. llvm-svn: 187496
131 lines
3.3 KiB
LLVM
131 lines
3.3 KiB
LLVM
; Test LOCG.
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;
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; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z196 | FileCheck %s
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declare i64 @foo(i64 *)
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; Test the simple case.
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define i64 @f1(i64 %easy, i64 *%ptr, i64 %limit) {
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; CHECK-LABEL: f1:
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; CHECK: clgfi %r4, 42
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; CHECK: locghe %r2, 0(%r3)
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; CHECK: br %r14
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%cond = icmp ult i64 %limit, 42
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%other = load i64 *%ptr
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%res = select i1 %cond, i64 %easy, i64 %other
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ret i64 %res
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}
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; ...and again with the operands swapped.
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define i64 @f2(i64 %easy, i64 *%ptr, i64 %limit) {
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; CHECK-LABEL: f2:
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; CHECK: clgfi %r4, 42
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; CHECK: locgl %r2, 0(%r3)
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; CHECK: br %r14
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%cond = icmp ult i64 %limit, 42
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%other = load i64 *%ptr
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%res = select i1 %cond, i64 %other, i64 %easy
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ret i64 %res
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}
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; Check the high end of the aligned LOCG range.
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define i64 @f3(i64 %easy, i64 *%base, i64 %limit) {
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; CHECK-LABEL: f3:
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; CHECK: clgfi %r4, 42
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; CHECK: locghe %r2, 524280(%r3)
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; CHECK: br %r14
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%ptr = getelementptr i64 *%base, i64 65535
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%cond = icmp ult i64 %limit, 42
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%other = load i64 *%ptr
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%res = select i1 %cond, i64 %easy, i64 %other
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ret i64 %res
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}
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; Check the next doubleword up. Other sequences besides this one would be OK.
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define i64 @f4(i64 %easy, i64 *%base, i64 %limit) {
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; CHECK-LABEL: f4:
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; CHECK: agfi %r3, 524288
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; CHECK: clgfi %r4, 42
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; CHECK: locghe %r2, 0(%r3)
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; CHECK: br %r14
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%ptr = getelementptr i64 *%base, i64 65536
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%cond = icmp ult i64 %limit, 42
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%other = load i64 *%ptr
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%res = select i1 %cond, i64 %easy, i64 %other
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ret i64 %res
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}
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; Check the low end of the LOCG range.
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define i64 @f5(i64 %easy, i64 *%base, i64 %limit) {
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; CHECK-LABEL: f5:
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; CHECK: clgfi %r4, 42
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; CHECK: locghe %r2, -524288(%r3)
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; CHECK: br %r14
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%ptr = getelementptr i64 *%base, i64 -65536
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%cond = icmp ult i64 %limit, 42
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%other = load i64 *%ptr
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%res = select i1 %cond, i64 %easy, i64 %other
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ret i64 %res
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}
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; Check the next doubleword down, with the same comments as f4.
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define i64 @f6(i64 %easy, i64 *%base, i64 %limit) {
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; CHECK-LABEL: f6:
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; CHECK: agfi %r3, -524296
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; CHECK: clgfi %r4, 42
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; CHECK: locghe %r2, 0(%r3)
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; CHECK: br %r14
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%ptr = getelementptr i64 *%base, i64 -65537
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%cond = icmp ult i64 %limit, 42
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%other = load i64 *%ptr
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%res = select i1 %cond, i64 %easy, i64 %other
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ret i64 %res
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}
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; Try a frame index base.
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define i64 @f7(i64 %alt, i64 %limit) {
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; CHECK-LABEL: f7:
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; CHECK: brasl %r14, foo@PLT
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; CHECK: locghe %r2, {{[0-9]+}}(%r15)
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; CHECK: br %r14
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%ptr = alloca i64
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%easy = call i64 @foo(i64 *%ptr)
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%cond = icmp ult i64 %limit, 42
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%other = load i64 *%ptr
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%res = select i1 %cond, i64 %easy, i64 %other
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ret i64 %res
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}
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; Try a case when an index is involved.
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define i64 @f8(i64 %easy, i64 %limit, i64 %base, i64 %index) {
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; CHECK-LABEL: f8:
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; CHECK: clgfi %r3, 42
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; CHECK: locghe %r2, 0({{%r[1-5]}})
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; CHECK: br %r14
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%add = add i64 %base, %index
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%ptr = inttoptr i64 %add to i64 *
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%cond = icmp ult i64 %limit, 42
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%other = load i64 *%ptr
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%res = select i1 %cond, i64 %easy, i64 %other
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ret i64 %res
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}
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; Test that conditionally-executed loads do not use LOCG, since it is allowed
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; to trap even when the condition is false.
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define i64 @f9(i64 %easy, i64 %limit, i64 *%ptr) {
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; CHECK-LABEL: f9:
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; CHECK-NOT: locg
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; CHECK: br %r14
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entry:
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%cmp = icmp ule i64 %easy, %limit
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br i1 %cmp, label %load, label %exit
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load:
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%other = load i64 *%ptr
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br label %exit
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exit:
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%res = phi i64 [ %easy, %entry ], [ %other, %load ]
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ret i64 %res
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}
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