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llvm-mirror/docs/AMDGPU/gfx8_offset_smem_store.rst
Dmitry Preobrazhensky ce9abb7e3a [AMDGPU][MC][DOC] Updated AMD GPU assembler description
Stage 2: added detailed description of operands

See bug 36572: https://bugs.llvm.org/show_bug.cgi?id=36572

llvm-svn: 349368
2018-12-17 17:38:11 +00:00

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.. _amdgpu_synid8_offset_smem_store:
soffset
===========================
An unsigned byte offset added to the base address to get memory address.
*Size:* 1 dword.
*Operands:* :ref:`m0<amdgpu_synid_m0>`, :ref:`uimm20<amdgpu_synid_uimm20>`