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llvm-mirror/test/CodeGen/Mips/pr42736.ll
Simon Atanasyan 9d10d98e8b [mips] Fix 64-bit address loading in case of applying 32-bit mask to the result
If result of 64-bit address loading combines with 32-bit mask, LLVM
tries to optimize the code and remove "redundant" loading of upper
32-bits of the address. It leads to incorrect code on MIPS64 targets.

MIPS backend creates the following chain of commands to load 64-bit
address in the `MipsTargetLowering::getAddrNonPICSym64` method:
```
(add (shl (add (shl (add %highest(sym), %higher(sym)),
                    16),
               %hi(sym)),
          16),
     %lo(%sym))
```

If the mask presents, LLVM decides to optimize the chain of commands. It
really does not make sense to load upper 32-bits because the 0x0fffffff
mask anyway clears them. After removing redundant commands we get this
chain:
```
(add (shl (%hi(sym), 16), %lo(%sym))
```

There is no patterns matched `(MipsHi (i64 symbol))`. Due a bug in `SYM_32`
predicate definition, backend incorrectly selects a pattern for a 32-bit
symbols and uses the `lui` instruction for loading `%hi(sym)`.

As a result we get incorrect set of instructions with unnecessary 16-bit
left shifting:
```
lui     at,0x0
    R_MIPS_HI16     foo
dsll    at,at,0x10
daddiu  at,at,0
    R_MIPS_LO16     foo
```

This patch resolves two problems:
- Fix `SYM_32/SYM_64` predicates to prevent selection of patterns dedicated
  to 32-bit symbols in case of using N64 ABI.
- Add missed patterns for 64-bit symbols for `%hi/%lo`.

Fix PR42736.

Differential Revision: https://reviews.llvm.org/D66228

llvm-svn: 370268
2019-08-28 22:32:10 +00:00

29 lines
993 B
LLVM

; RUN: llc -mtriple=mips64-linux-gnuabi64 \
; RUN: -relocation-model=pic < %s | FileCheck %s -check-prefix=PIC
; RUN: llc -mtriple=mips64-linux-gnuabi64 \
; RUN: -relocation-model=static < %s | FileCheck %s -check-prefix=STATIC
define void @bar1() nounwind {
entry:
; PIC: lui $[[R0:[0-9]+]], 4095
; PIC-NEXT: ori $[[R0]], $[[R0]], 65535
; PIC-NEXT: ld $[[R1:[0-9]+]], %got_disp(foo)(${{[0-9]+}})
; PIC-NEXT: and $[[R1]], $[[R1]], $[[R0]]
; PIC-NEXT: sd $[[R1]]
; STATIC: lui $[[R0:[0-9]+]], 4095
; STATIC-NEXT: ori $[[R0]], $[[R0]], 65535
; STATIC-NEXT: daddiu $[[R1:[0-9]+]], $zero, %hi(foo)
; STATIC-NEXT: dsll $[[R1]], $[[R1]], 16
; STATIC-NEXT: daddiu $[[R1]], $[[R1]], %lo(foo)
; STATIC-NEXT: and $[[R0]], $[[R1]], $[[R0]]
; STATIC-NEXT: sd $[[R0]]
%val = alloca i64, align 8
store i64 and (i64 ptrtoint (void ()* @foo to i64), i64 268435455), i64* %val, align 8
%0 = load i64, i64* %val, align 8
ret void
}
declare void @foo()