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llvm-mirror/test/CodeGen/X86/cmov-promotion.ll
QingShan Zhang 3554d5db53 Teach the DAGCombine to fold this pattern(c1 and c2 is constant).
// fold (sext (select cond, c1, c2)) -> (select cond, sext c1, sext c2)
// fold (zext (select cond, c1, c2)) -> (select cond, zext c1, zext c2)
// fold (aext (select cond, c1, c2)) -> (select cond, sext c1, sext c2)
Sign extend the operands if it is any_extend, to keep the signess of the operands that, the other combine rule would apply. The any_extend is handled as zero extend for constants. i.e.

t1: i8 = select t0, Constant:i8<-1>, Constant:i8<0>
t2: i64 = any_extend t1
 -->
t3: i64 = select t0, Constant:i64<-1>, Constant:i64<0>
 -->
t4: i64 = sign_extend_inreg t3

Differential Revision: https://reviews.llvm.org/D63318

llvm-svn: 364382
2019-06-26 05:12:53 +00:00

296 lines
8.6 KiB
LLVM

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+cmov | FileCheck %s --check-prefix=CMOV
; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=-cmov | FileCheck %s --check-prefix=NO_CMOV
define i16 @cmov_zpromotion_8_to_16(i1 %c) {
; CMOV-LABEL: cmov_zpromotion_8_to_16:
; CMOV: # %bb.0:
; CMOV-NEXT: testb $1, %dil
; CMOV-NEXT: movl $117, %ecx
; CMOV-NEXT: movl $237, %eax
; CMOV-NEXT: cmovnel %ecx, %eax
; CMOV-NEXT: # kill: def $ax killed $ax killed $eax
; CMOV-NEXT: retq
;
; NO_CMOV-LABEL: cmov_zpromotion_8_to_16:
; NO_CMOV: # %bb.0:
; NO_CMOV-NEXT: testb $1, {{[0-9]+}}(%esp)
; NO_CMOV-NEXT: movl $117, %eax
; NO_CMOV-NEXT: jne .LBB0_2
; NO_CMOV-NEXT: # %bb.1:
; NO_CMOV-NEXT: movl $237, %eax
; NO_CMOV-NEXT: .LBB0_2:
; NO_CMOV-NEXT: # kill: def $ax killed $ax killed $eax
; NO_CMOV-NEXT: retl
%t0 = select i1 %c, i8 117, i8 -19
%ret = zext i8 %t0 to i16
ret i16 %ret
}
define i32 @cmov_zpromotion_8_to_32(i1 %c) {
; CMOV-LABEL: cmov_zpromotion_8_to_32:
; CMOV: # %bb.0:
; CMOV-NEXT: testb $1, %dil
; CMOV-NEXT: movl $126, %ecx
; CMOV-NEXT: movl $255, %eax
; CMOV-NEXT: cmovnel %ecx, %eax
; CMOV-NEXT: retq
;
; NO_CMOV-LABEL: cmov_zpromotion_8_to_32:
; NO_CMOV: # %bb.0:
; NO_CMOV-NEXT: testb $1, {{[0-9]+}}(%esp)
; NO_CMOV-NEXT: movl $126, %eax
; NO_CMOV-NEXT: jne .LBB1_2
; NO_CMOV-NEXT: # %bb.1:
; NO_CMOV-NEXT: movl $255, %eax
; NO_CMOV-NEXT: .LBB1_2:
; NO_CMOV-NEXT: retl
%t0 = select i1 %c, i8 12414, i8 -1
%ret = zext i8 %t0 to i32
ret i32 %ret
}
define i64 @cmov_zpromotion_8_to_64(i1 %c) {
; CMOV-LABEL: cmov_zpromotion_8_to_64:
; CMOV: # %bb.0:
; CMOV-NEXT: testb $1, %dil
; CMOV-NEXT: movl $126, %ecx
; CMOV-NEXT: movl $255, %eax
; CMOV-NEXT: cmovneq %rcx, %rax
; CMOV-NEXT: retq
;
; NO_CMOV-LABEL: cmov_zpromotion_8_to_64:
; NO_CMOV: # %bb.0:
; NO_CMOV-NEXT: testb $1, {{[0-9]+}}(%esp)
; NO_CMOV-NEXT: movl $126, %eax
; NO_CMOV-NEXT: jne .LBB2_2
; NO_CMOV-NEXT: # %bb.1:
; NO_CMOV-NEXT: movl $255, %eax
; NO_CMOV-NEXT: .LBB2_2:
; NO_CMOV-NEXT: xorl %edx, %edx
; NO_CMOV-NEXT: retl
%t0 = select i1 %c, i8 12414, i8 -1
%ret = zext i8 %t0 to i64
ret i64 %ret
}
define i32 @cmov_zpromotion_16_to_32(i1 %c) {
; CMOV-LABEL: cmov_zpromotion_16_to_32:
; CMOV: # %bb.0:
; CMOV-NEXT: testb $1, %dil
; CMOV-NEXT: movl $12414, %ecx # imm = 0x307E
; CMOV-NEXT: movl $65535, %eax # imm = 0xFFFF
; CMOV-NEXT: cmovnel %ecx, %eax
; CMOV-NEXT: retq
;
; NO_CMOV-LABEL: cmov_zpromotion_16_to_32:
; NO_CMOV: # %bb.0:
; NO_CMOV-NEXT: testb $1, {{[0-9]+}}(%esp)
; NO_CMOV-NEXT: movl $12414, %eax # imm = 0x307E
; NO_CMOV-NEXT: jne .LBB3_2
; NO_CMOV-NEXT: # %bb.1:
; NO_CMOV-NEXT: movl $65535, %eax # imm = 0xFFFF
; NO_CMOV-NEXT: .LBB3_2:
; NO_CMOV-NEXT: retl
%t0 = select i1 %c, i16 12414, i16 -1
%ret = zext i16 %t0 to i32
ret i32 %ret
}
define i64 @cmov_zpromotion_16_to_64(i1 %c) {
; CMOV-LABEL: cmov_zpromotion_16_to_64:
; CMOV: # %bb.0:
; CMOV-NEXT: testb $1, %dil
; CMOV-NEXT: movl $12414, %ecx # imm = 0x307E
; CMOV-NEXT: movl $65535, %eax # imm = 0xFFFF
; CMOV-NEXT: cmovneq %rcx, %rax
; CMOV-NEXT: retq
;
; NO_CMOV-LABEL: cmov_zpromotion_16_to_64:
; NO_CMOV: # %bb.0:
; NO_CMOV-NEXT: testb $1, {{[0-9]+}}(%esp)
; NO_CMOV-NEXT: movl $12414, %eax # imm = 0x307E
; NO_CMOV-NEXT: jne .LBB4_2
; NO_CMOV-NEXT: # %bb.1:
; NO_CMOV-NEXT: movl $65535, %eax # imm = 0xFFFF
; NO_CMOV-NEXT: .LBB4_2:
; NO_CMOV-NEXT: xorl %edx, %edx
; NO_CMOV-NEXT: retl
%t0 = select i1 %c, i16 12414, i16 -1
%ret = zext i16 %t0 to i64
ret i64 %ret
}
define i64 @cmov_zpromotion_32_to_64(i1 %c) {
; CMOV-LABEL: cmov_zpromotion_32_to_64:
; CMOV: # %bb.0:
; CMOV-NEXT: testb $1, %dil
; CMOV-NEXT: movl $12414, %ecx # imm = 0x307E
; CMOV-NEXT: movl $-1, %eax
; CMOV-NEXT: cmovnel %ecx, %eax
; CMOV-NEXT: retq
;
; NO_CMOV-LABEL: cmov_zpromotion_32_to_64:
; NO_CMOV: # %bb.0:
; NO_CMOV-NEXT: testb $1, {{[0-9]+}}(%esp)
; NO_CMOV-NEXT: movl $12414, %eax # imm = 0x307E
; NO_CMOV-NEXT: jne .LBB5_2
; NO_CMOV-NEXT: # %bb.1:
; NO_CMOV-NEXT: movl $-1, %eax
; NO_CMOV-NEXT: .LBB5_2:
; NO_CMOV-NEXT: xorl %edx, %edx
; NO_CMOV-NEXT: retl
%t0 = select i1 %c, i32 12414, i32 -1
%ret = zext i32 %t0 to i64
ret i64 %ret
}
define i16 @cmov_spromotion_8_to_16(i1 %c) {
; CMOV-LABEL: cmov_spromotion_8_to_16:
; CMOV: # %bb.0:
; CMOV-NEXT: testb $1, %dil
; CMOV-NEXT: movl $117, %ecx
; CMOV-NEXT: movl $65517, %eax # imm = 0xFFED
; CMOV-NEXT: cmovnel %ecx, %eax
; CMOV-NEXT: # kill: def $ax killed $ax killed $eax
; CMOV-NEXT: retq
;
; NO_CMOV-LABEL: cmov_spromotion_8_to_16:
; NO_CMOV: # %bb.0:
; NO_CMOV-NEXT: testb $1, {{[0-9]+}}(%esp)
; NO_CMOV-NEXT: movl $117, %eax
; NO_CMOV-NEXT: jne .LBB6_2
; NO_CMOV-NEXT: # %bb.1:
; NO_CMOV-NEXT: movl $65517, %eax # imm = 0xFFED
; NO_CMOV-NEXT: .LBB6_2:
; NO_CMOV-NEXT: # kill: def $ax killed $ax killed $eax
; NO_CMOV-NEXT: retl
%t0 = select i1 %c, i8 117, i8 -19
%ret = sext i8 %t0 to i16
ret i16 %ret
}
define i32 @cmov_spromotion_8_to_32(i1 %c) {
; CMOV-LABEL: cmov_spromotion_8_to_32:
; CMOV: # %bb.0:
; CMOV-NEXT: testb $1, %dil
; CMOV-NEXT: movl $126, %ecx
; CMOV-NEXT: movl $-1, %eax
; CMOV-NEXT: cmovnel %ecx, %eax
; CMOV-NEXT: retq
;
; NO_CMOV-LABEL: cmov_spromotion_8_to_32:
; NO_CMOV: # %bb.0:
; NO_CMOV-NEXT: testb $1, {{[0-9]+}}(%esp)
; NO_CMOV-NEXT: movl $126, %eax
; NO_CMOV-NEXT: jne .LBB7_2
; NO_CMOV-NEXT: # %bb.1:
; NO_CMOV-NEXT: movl $-1, %eax
; NO_CMOV-NEXT: .LBB7_2:
; NO_CMOV-NEXT: retl
%t0 = select i1 %c, i8 12414, i8 -1
%ret = sext i8 %t0 to i32
ret i32 %ret
}
define i64 @cmov_spromotion_8_to_64(i1 %c) {
; CMOV-LABEL: cmov_spromotion_8_to_64:
; CMOV: # %bb.0:
; CMOV-NEXT: testb $1, %dil
; CMOV-NEXT: movl $126, %ecx
; CMOV-NEXT: movq $-1, %rax
; CMOV-NEXT: cmovneq %rcx, %rax
; CMOV-NEXT: retq
;
; NO_CMOV-LABEL: cmov_spromotion_8_to_64:
; NO_CMOV: # %bb.0:
; NO_CMOV-NEXT: testb $1, {{[0-9]+}}(%esp)
; NO_CMOV-NEXT: jne .LBB8_1
; NO_CMOV-NEXT: # %bb.2:
; NO_CMOV-NEXT: movl $-1, %eax
; NO_CMOV-NEXT: movl $-1, %edx
; NO_CMOV-NEXT: retl
; NO_CMOV-NEXT: .LBB8_1:
; NO_CMOV-NEXT: xorl %edx, %edx
; NO_CMOV-NEXT: movl $126, %eax
; NO_CMOV-NEXT: retl
%t0 = select i1 %c, i8 12414, i8 -1
%ret = sext i8 %t0 to i64
ret i64 %ret
}
define i32 @cmov_spromotion_16_to_32(i1 %c) {
; CMOV-LABEL: cmov_spromotion_16_to_32:
; CMOV: # %bb.0:
; CMOV-NEXT: testb $1, %dil
; CMOV-NEXT: movl $12414, %ecx # imm = 0x307E
; CMOV-NEXT: movl $-1, %eax
; CMOV-NEXT: cmovnel %ecx, %eax
; CMOV-NEXT: retq
;
; NO_CMOV-LABEL: cmov_spromotion_16_to_32:
; NO_CMOV: # %bb.0:
; NO_CMOV-NEXT: testb $1, {{[0-9]+}}(%esp)
; NO_CMOV-NEXT: movl $12414, %eax # imm = 0x307E
; NO_CMOV-NEXT: jne .LBB9_2
; NO_CMOV-NEXT: # %bb.1:
; NO_CMOV-NEXT: movl $-1, %eax
; NO_CMOV-NEXT: .LBB9_2:
; NO_CMOV-NEXT: retl
%t0 = select i1 %c, i16 12414, i16 -1
%ret = sext i16 %t0 to i32
ret i32 %ret
}
define i64 @cmov_spromotion_16_to_64(i1 %c) {
; CMOV-LABEL: cmov_spromotion_16_to_64:
; CMOV: # %bb.0:
; CMOV-NEXT: testb $1, %dil
; CMOV-NEXT: movl $12414, %ecx # imm = 0x307E
; CMOV-NEXT: movq $-1, %rax
; CMOV-NEXT: cmovneq %rcx, %rax
; CMOV-NEXT: retq
;
; NO_CMOV-LABEL: cmov_spromotion_16_to_64:
; NO_CMOV: # %bb.0:
; NO_CMOV-NEXT: testb $1, {{[0-9]+}}(%esp)
; NO_CMOV-NEXT: jne .LBB10_1
; NO_CMOV-NEXT: # %bb.2:
; NO_CMOV-NEXT: movl $-1, %eax
; NO_CMOV-NEXT: movl $-1, %edx
; NO_CMOV-NEXT: retl
; NO_CMOV-NEXT: .LBB10_1:
; NO_CMOV-NEXT: xorl %edx, %edx
; NO_CMOV-NEXT: movl $12414, %eax # imm = 0x307E
; NO_CMOV-NEXT: retl
%t0 = select i1 %c, i16 12414, i16 -1
%ret = sext i16 %t0 to i64
ret i64 %ret
}
define i64 @cmov_spromotion_32_to_64(i1 %c) {
; CMOV-LABEL: cmov_spromotion_32_to_64:
; CMOV: # %bb.0:
; CMOV-NEXT: testb $1, %dil
; CMOV-NEXT: movl $12414, %ecx # imm = 0x307E
; CMOV-NEXT: movq $-1, %rax
; CMOV-NEXT: cmovneq %rcx, %rax
; CMOV-NEXT: retq
;
; NO_CMOV-LABEL: cmov_spromotion_32_to_64:
; NO_CMOV: # %bb.0:
; NO_CMOV-NEXT: testb $1, {{[0-9]+}}(%esp)
; NO_CMOV-NEXT: jne .LBB11_1
; NO_CMOV-NEXT: # %bb.2:
; NO_CMOV-NEXT: movl $-1, %eax
; NO_CMOV-NEXT: movl $-1, %edx
; NO_CMOV-NEXT: retl
; NO_CMOV-NEXT: .LBB11_1:
; NO_CMOV-NEXT: xorl %edx, %edx
; NO_CMOV-NEXT: movl $12414, %eax # imm = 0x307E
; NO_CMOV-NEXT: retl
%t0 = select i1 %c, i32 12414, i32 -1
%ret = sext i32 %t0 to i64
ret i64 %ret
}