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llvm-mirror/test/CodeGen/X86/pr34381.ll
Sanjay Patel 6fae7ed86a [DAGCombiner] allow narrowing of add followed by truncate
trunc (add X, C ) --> add (trunc X), C'

If we're throwing away the top bits of an 'add' instruction, do it in the narrow destination type.
This makes the truncate-able opcode list identical to the sibling transform done in IR (in instcombine).

This change used to show regressions for x86, but those are gone after D55494. 
This gets us closer to deleting the x86 custom function (combineTruncatedArithmetic) 
that does almost the same thing.

Differential Revision: https://reviews.llvm.org/D55866

llvm-svn: 350006
2018-12-22 17:10:31 +00:00

42 lines
1.3 KiB
LLVM

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
;RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -mattr=slow-incdec | FileCheck %s
@var_21 = external constant i32, align 4
@var_29 = external constant i8, align 1
@var_390 = external global i32, align 4
@var_11 = external constant i8, align 1
@var_370 = external global i8, align 1
; Function Attrs: noinline nounwind optnone uwtable
define void @_Z3foov() {
; CHECK-LABEL: _Z3foov:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: movsbl {{.*}}(%rip), %eax
; CHECK-NEXT: negl %eax
; CHECK-NEXT: xorl %ecx, %ecx
; CHECK-NEXT: cmpl %eax, {{.*}}(%rip)
; CHECK-NEXT: setb %cl
; CHECK-NEXT: movl %ecx, {{.*}}(%rip)
; CHECK-NEXT: movb {{.*}}(%rip), %al
; CHECK-NEXT: movb %al, {{.*}}(%rip)
; CHECK-NEXT: retq
entry:
%0 = load i32, i32* @var_21, align 4
%1 = load i8, i8* @var_29, align 1
%conv = sext i8 %1 to i32
%sub = sub nsw i32 0, %conv
%cmp = icmp ult i32 %0, %sub
%conv1 = zext i1 %cmp to i32
%add = add nsw i32 %conv1, -1
%conv2 = trunc i32 %add to i8
%tobool = icmp ne i8 %conv2, 0
%lnot = xor i1 %tobool, true
%conv3 = zext i1 %lnot to i32
store i32 %conv3, i32* @var_390, align 4
%2 = load i8, i8* @var_11, align 1
%conv4 = sext i8 %2 to i16
%conv5 = trunc i16 %conv4 to i8
store i8 %conv5, i8* @var_370, align 1
ret void
}