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6655b5e078
Summary: A number of optimizations are inhibited by single-use TokenFactors not being merged into the TokenFactor using it. This makes we consider if we can do the merge immediately. Most tests changes here are due to the change in visitation causing minor reorderings and associated reassociation of paired memory operations. CodeGen tests with non-reordering changes: X86/aligned-variadic.ll -- memory-based add folded into stored leaq value. X86/constant-combiners.ll -- Optimizes out overlap between stores. X86/pr40631_deadstore_elision -- folds constant byte store into preceding quad word constant store. Reviewers: RKSimon, craig.topper, spatel, efriedma, courbet Reviewed By: courbet Subscribers: dylanmckay, sdardis, nemanjai, jvesely, nhaehnle, javed.absar, eraman, hiraditya, kbarton, jrtc27, atanasyan, jsji, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D59260 llvm-svn: 356068
71 lines
3.2 KiB
LLVM
71 lines
3.2 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -o - %s -mtriple=x86_64-unknown-linux-gnu | FileCheck %s
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%struct.sk_buff = type { i8* }
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%struct.xt_action_param = type { i8*, i8*, i8*, i32, i32, i8 }
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define i32 @ipt_do_table(%struct.sk_buff* noalias nocapture readonly) {
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; CHECK-LABEL: ipt_do_table:
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; CHECK: # %bb.0:
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; CHECK-NEXT: subq $40, %rsp
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; CHECK-NEXT: .cfi_def_cfa_offset 48
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; CHECK-NEXT: movq (%rdi), %rax
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; CHECK-NEXT: xorps %xmm0, %xmm0
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; CHECK-NEXT: movaps %xmm0, {{[0-9]+}}(%rsp)
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; CHECK-NEXT: movq $170, {{[0-9]+}}(%rsp)
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; CHECK-NEXT: movaps {{.*#+}} xmm0 = [12297829382473034410,12297829382473034410]
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; CHECK-NEXT: movaps %xmm0, (%rsp)
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; CHECK-NEXT: movabsq $-6148914691236517206, %rcx # imm = 0xAAAAAAAAAAAAAAAA
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; CHECK-NEXT: movq %rcx, {{[0-9]+}}(%rsp)
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; CHECK-NEXT: movq %rcx, {{[0-9]+}}(%rsp)
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; CHECK-NEXT: movzwl 2(%rax), %ecx
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; CHECK-NEXT: andl $8191, %ecx # imm = 0x1FFF
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; CHECK-NEXT: movl %ecx, {{[0-9]+}}(%rsp)
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; CHECK-NEXT: movzbl (%rax), %eax
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; CHECK-NEXT: andl $15, %eax
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; CHECK-NEXT: movl %eax, {{[0-9]+}}(%rsp)
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; CHECK-NEXT: movb $0, {{[0-9]+}}(%rsp)
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; CHECK-NEXT: movq %rsp, %rdi
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; CHECK-NEXT: callq use_it
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; CHECK-NEXT: addq $40, %rsp
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; CHECK-NEXT: .cfi_def_cfa_offset 8
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; CHECK-NEXT: retq
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%2 = alloca %struct.xt_action_param, align 16
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%3 = getelementptr inbounds %struct.sk_buff, %struct.sk_buff* %0, i64 0, i32 0
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%4 = load i8*, i8** %3, align 8
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%5 = bitcast %struct.xt_action_param* %2 to i8*
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call void @llvm.lifetime.start.p0i8(i64 40, i8* nonnull %5) #3
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call void @llvm.memset.p0i8.i64(i8* nonnull align 16 %5, i8 0, i64 40, i1 false)
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%6 = bitcast %struct.xt_action_param* %2 to <2 x i8*>*
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store <2 x i8*> <i8* inttoptr (i64 -6148914691236517206 to i8*), i8* inttoptr (i64 -6148914691236517206 to i8*)>, <2 x i8*>* %6, align 16
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%7 = getelementptr inbounds %struct.xt_action_param, %struct.xt_action_param* %2, i64 0, i32 2
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store i8* inttoptr (i64 -6148914691236517206 to i8*), i8** %7, align 16
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%8 = getelementptr inbounds %struct.xt_action_param, %struct.xt_action_param* %2, i64 0, i32 3
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%9 = getelementptr inbounds %struct.xt_action_param, %struct.xt_action_param* %2, i64 0, i32 4
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%10 = getelementptr inbounds %struct.xt_action_param, %struct.xt_action_param* %2, i64 0, i32 5
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%11 = getelementptr inbounds i8, i8* %4, i64 2
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%12 = bitcast i8* %11 to i16*
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%13 = bitcast i32* %8 to i8*
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call void @llvm.memset.p0i8.i64(i8* nonnull align 8 %13, i8 -86, i64 9, i1 false)
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%14 = load i16, i16* %12, align 2
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%15 = and i16 %14, 8191
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%16 = zext i16 %15 to i32
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store i32 %16, i32* %8, align 8
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%17 = load i8, i8* %4, align 2
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%18 = and i8 %17, 15
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%19 = zext i8 %18 to i32
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store i32 %19, i32* %9, align 4
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store i8 0, i8* %10, align 16
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%20 = call i32 @use_it(%struct.xt_action_param* nonnull %2)
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call void @llvm.lifetime.end.p0i8(i64 40, i8* nonnull %5)
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ret i32 %20
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}
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declare void @llvm.lifetime.start.p0i8(i64, i8* nocapture)
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declare void @llvm.memset.p0i8.i64(i8* nocapture writeonly, i8, i64, i1)
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declare dso_local i32 @use_it(%struct.xt_action_param*) local_unnamed_addr
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declare void @llvm.lifetime.end.p0i8(i64, i8* nocapture)
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