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llvm-mirror/test/CodeGen/X86/uint_to_fp.ll
Craig Topper cb2d622c70 [X86] Remove the suffix on vcvt[u]si2ss/sd register variants in assembly printing.
We require d/q suffixes on the memory form of these instructions to disambiguate the memory size.
We don't require it on the register forms, but need to support parsing both with and without it.

Previously we always printed the d/q suffix on the register forms, but it's redundant and
inconsistent with gcc and objdump.

After this patch we should support the d/q for parsing, but not print it when its unneeded.

llvm-svn: 360085
2019-05-06 21:39:51 +00:00

28 lines
853 B
LLVM

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc < %s -mtriple=i386-apple-darwin8 -mattr=+sse2 | FileCheck %s --check-prefix=X32
; RUN: llc < %s -mtriple=x86_64-apple-darwin8 -mattr=+sse2 | FileCheck %s --check-prefix=X64
; rdar://6034396
define void @test(i32 %x, float* %y) nounwind {
; X32-LABEL: test:
; X32: ## %bb.0: ## %entry
; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X32-NEXT: shrl $23, %ecx
; X32-NEXT: cvtsi2ss %ecx, %xmm0
; X32-NEXT: movss %xmm0, (%eax)
; X32-NEXT: retl
;
; X64-LABEL: test:
; X64: ## %bb.0: ## %entry
; X64-NEXT: shrl $23, %edi
; X64-NEXT: cvtsi2ss %edi, %xmm0
; X64-NEXT: movss %xmm0, (%rsi)
; X64-NEXT: retq
entry:
lshr i32 %x, 23
uitofp i32 %0 to float
store float %1, float* %y
ret void
}