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6655b5e078
Summary: A number of optimizations are inhibited by single-use TokenFactors not being merged into the TokenFactor using it. This makes we consider if we can do the merge immediately. Most tests changes here are due to the change in visitation causing minor reorderings and associated reassociation of paired memory operations. CodeGen tests with non-reordering changes: X86/aligned-variadic.ll -- memory-based add folded into stored leaq value. X86/constant-combiners.ll -- Optimizes out overlap between stores. X86/pr40631_deadstore_elision -- folds constant byte store into preceding quad word constant store. Reviewers: RKSimon, craig.topper, spatel, efriedma, courbet Reviewed By: courbet Subscribers: dylanmckay, sdardis, nemanjai, jvesely, nhaehnle, javed.absar, eraman, hiraditya, kbarton, jrtc27, atanasyan, jsji, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D59260 llvm-svn: 356068
58 lines
2.1 KiB
LLVM
58 lines
2.1 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc %s -o - | FileCheck %s
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target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128"
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target triple = "x86_64-apple-macosx10.10.0"
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; Check that vastart handling doesn't get between testb and je for the branch.
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define i32 @check_flag(i32 %flags, ...) nounwind {
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; CHECK-LABEL: check_flag:
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; CHECK: ## %bb.0: ## %entry
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; CHECK-NEXT: subq $56, %rsp
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; CHECK-NEXT: testb %al, %al
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; CHECK-NEXT: je LBB0_2
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; CHECK-NEXT: ## %bb.1: ## %entry
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; CHECK-NEXT: movaps %xmm0, -{{[0-9]+}}(%rsp)
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; CHECK-NEXT: movaps %xmm1, -{{[0-9]+}}(%rsp)
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; CHECK-NEXT: movaps %xmm2, -{{[0-9]+}}(%rsp)
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; CHECK-NEXT: movaps %xmm3, -{{[0-9]+}}(%rsp)
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; CHECK-NEXT: movaps %xmm4, -{{[0-9]+}}(%rsp)
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; CHECK-NEXT: movaps %xmm5, (%rsp)
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; CHECK-NEXT: movaps %xmm6, {{[0-9]+}}(%rsp)
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; CHECK-NEXT: movaps %xmm7, {{[0-9]+}}(%rsp)
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; CHECK-NEXT: LBB0_2: ## %entry
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; CHECK-NEXT: movq %rsi, -{{[0-9]+}}(%rsp)
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; CHECK-NEXT: movq %rdx, -{{[0-9]+}}(%rsp)
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; CHECK-NEXT: movq %rcx, -{{[0-9]+}}(%rsp)
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; CHECK-NEXT: movq %r8, -{{[0-9]+}}(%rsp)
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; CHECK-NEXT: movq %r9, -{{[0-9]+}}(%rsp)
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; CHECK-NEXT: xorl %eax, %eax
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; CHECK-NEXT: testl $512, %edi ## imm = 0x200
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; CHECK-NEXT: je LBB0_4
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; CHECK-NEXT: ## %bb.3: ## %if.then
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; CHECK-NEXT: leaq -{{[0-9]+}}(%rsp), %rax
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; CHECK-NEXT: movq %rax, 16
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; CHECK-NEXT: leaq {{[0-9]+}}(%rsp), %rax
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; CHECK-NEXT: movq %rax, 8
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; CHECK-NEXT: movl $48, 4
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; CHECK-NEXT: movl $8, 0
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; CHECK-NEXT: movl $1, %eax
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; CHECK-NEXT: LBB0_4: ## %if.end
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; CHECK-NEXT: addq $56, %rsp
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; CHECK-NEXT: retq
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entry:
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%and = and i32 %flags, 512
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%tobool = icmp eq i32 %and, 0
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br i1 %tobool, label %if.end, label %if.then
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if.then: ; preds = %entry
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call void @llvm.va_start(i8* null)
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br label %if.end
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if.end: ; preds = %entry, %if.then
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%hasflag = phi i32 [ 1, %if.then ], [ 0, %entry ]
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ret i32 %hasflag
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}
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declare void @llvm.va_start(i8*) nounwind
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