| .. |
|
2006-11-10-CycleInDAG.ll
|
|
|
|
2007-01-19-InfiniteLoop.ll
|
Split the Add, Sub, and Mul instruction opcodes into separate
|
2009-06-04 22:49:04 +00:00 |
|
2007-01-31-RegInfoAssert.ll
|
|
|
|
2007-02-02-JoinIntervalsCrash.ll
|
|
|
|
2007-03-06-AddR7.ll
|
|
|
|
2007-03-07-CombinerCrash.ll
|
|
|
|
2007-03-13-InstrSched.ll
|
Expand GEPs in ScalarEvolution expressions. SCEV expressions can now
|
2009-04-16 03:18:22 +00:00 |
|
2007-03-21-JoinIntervalsCrash.ll
|
|
|
|
2007-03-26-RegScavengerAssert.ll
|
|
|
|
2007-03-27-RegScavengerAssert.ll
|
|
|
|
2007-03-30-RegScavengerAssert.ll
|
|
|
|
2007-04-02-RegScavengerAssert.ll
|
|
|
|
2007-04-03-PEIBug.ll
|
|
|
|
2007-04-03-UndefinedSymbol.ll
|
|
|
|
2007-04-30-CombinerCrash.ll
|
|
|
|
2007-05-03-BadPostIndexedLd.ll
|
|
|
|
2007-05-05-InvalidPushPop.ll
|
|
|
|
2007-05-07-jumptoentry.ll
|
|
|
|
2007-05-07-tailmerge-1.ll
|
|
|
|
2007-05-09-tailmerge-2.ll
|
|
|
|
2007-05-14-InlineAsmCstCrash.ll
|
|
|
|
2007-05-14-RegScavengerAssert.ll
|
|
|
|
2007-05-22-tailmerge-3.ll
|
|
|
|
2007-05-23-BadPreIndexedStore.ll
|
|
|
|
2007-05-31-RegScavengerInfiniteLoop.ll
|
|
|
|
2007-08-15-ReuseBug.ll
|
|
|
|
2008-02-04-LocalRegAllocBug.ll
|
|
|
|
2008-02-29-RegAllocLocal.ll
|
|
|
|
2008-03-05-SxtInRegBug.ll
|
|
|
|
2008-03-07-RegScavengerAssert.ll
|
|
|
|
2008-04-04-ScavengerAssert.ll
|
|
|
|
2008-04-10-ScavengerAssert.ll
|
|
|
|
2008-04-11-PHIofImpDef.ll
|
|
|
|
2008-05-19-LiveIntervalsBug.ll
|
|
|
|
2008-05-19-ScavengerAssert.ll
|
|
|
|
2008-07-17-Fdiv.ll
|
|
|
|
2008-07-24-CodeGenPrepCrash.ll
|
|
|
|
2008-08-07-AsmPrintBug.ll
|
|
|
|
2008-09-14-CoaleserBug.ll
|
|
|
|
2008-09-17-CoalescerBug.ll
|
|
|
|
2008-11-18-ScavengerAssert.ll
|
|
|
|
2008-11-19-ScavengerAssert.ll
|
Changing allocation ordering from r3 ... r0 back to r0 ... r3. The order change no longer make sense after the coalescing changes we have made since then.
|
2009-06-05 19:08:58 +00:00 |
|
2009-02-16-SpillerBug.ll
|
|
|
|
2009-02-22-SoftenFloatVaArg.ll
|
move a target-specific test into its directory so it isn't run if you
|
2009-04-10 23:58:38 +00:00 |
|
2009-02-27-SpillerBug.ll
|
Split the Add, Sub, and Mul instruction opcodes into separate
|
2009-06-04 22:49:04 +00:00 |
|
2009-03-07-SpillerBug.ll
|
Split the Add, Sub, and Mul instruction opcodes into separate
|
2009-06-04 22:49:04 +00:00 |
|
2009-03-09-AddrModeBug.ll
|
ARM isLegalAddressImmediate should check if type is a simple type now that optimizer can create values of funky scalar types.
|
2009-03-09 19:15:00 +00:00 |
|
2009-04-06-AsmModifier.ll
|
Use the output of the asm so the optimizer won't
|
2009-04-14 01:51:40 +00:00 |
|
2009-04-08-AggregateAddr.ll
|
Add testcase for PR3795.
|
2009-04-08 18:00:55 +00:00 |
|
2009-04-08-FloatUndef.ll
|
Split the Add, Sub, and Mul instruction opcodes into separate
|
2009-06-04 22:49:04 +00:00 |
|
2009-04-08-FREM.ll
|
Soft float support for FREM.
|
2009-04-08 16:20:57 +00:00 |
|
2009-04-09-RegScavengerAsm.ll
|
Fix pr3954. The register scavenger asserts for inline assembly with
|
2009-04-09 17:16:43 +00:00 |
|
2009-05-05-DAGCombineBug.ll
|
Do not use register as base ptr of pre- and post- inc/dec load / store nodes.
|
2009-05-06 18:25:01 +00:00 |
|
2009-05-07-RegAllocLocal.ll
|
Fix pr4100. Do not remove no-op copies when they are dead. The register
|
2009-05-07 23:47:03 +00:00 |
|
2009-05-11-CodePlacementCrash.ll
|
Fix pr4195: When iterating through predecessor blocks, break out of the loop
|
2009-05-12 03:48:10 +00:00 |
|
2009-05-18-InlineAsmMem.ll
|
Fix pr4091: Add support for "m" constraint in ARM inline assembly.
|
2009-05-19 05:53:42 +00:00 |
|
2009-06-04-MissingLiveIn.ll
|
A value defined by an implicit_def can be liven to a use BB. This is unfortunate. But register allocator still has to add it to the live-in set of the use BB.
|
2009-06-04 20:25:48 +00:00 |
|
2009-06-12-RegScavengerAssert.ll
|
If killed register is defined by implicit_def, do not clear it since it's live range may overlap another def of same register.
|
2009-06-12 21:34:26 +00:00 |
|
addrmode.ll
|
|
|
|
aliases.ll
|
|
|
|
align.ll
|
|
|
|
alloca.ll
|
|
|
|
argaddr.ll
|
|
|
|
arguments2.ll
|
Use CallConvLower.h and TableGen descriptions of the calling conventions
|
2009-04-17 19:07:39 +00:00 |
|
arguments3.ll
|
Use CallConvLower.h and TableGen descriptions of the calling conventions
|
2009-04-17 19:07:39 +00:00 |
|
arguments4.ll
|
Use CallConvLower.h and TableGen descriptions of the calling conventions
|
2009-04-17 19:07:39 +00:00 |
|
arguments5.ll
|
Use CallConvLower.h and TableGen descriptions of the calling conventions
|
2009-04-17 19:07:39 +00:00 |
|
arguments6.ll
|
Use CallConvLower.h and TableGen descriptions of the calling conventions
|
2009-04-17 19:07:39 +00:00 |
|
arguments7.ll
|
Use CallConvLower.h and TableGen descriptions of the calling conventions
|
2009-04-17 19:07:39 +00:00 |
|
arguments8.ll
|
Use CallConvLower.h and TableGen descriptions of the calling conventions
|
2009-04-17 19:07:39 +00:00 |
|
arguments_f64_backfill.ll
|
Add testcase for register scanveger assertion fix in r72755
|
2009-06-08 22:54:15 +00:00 |
|
arguments-nosplit-double.ll
|
Fix pr4058 and pr4059. Do not split i64 or double arguments between r3 and
|
2009-05-19 10:02:36 +00:00 |
|
arguments-nosplit-i64.ll
|
Fix pr4058 and pr4059. Do not split i64 or double arguments between r3 and
|
2009-05-19 10:02:36 +00:00 |
|
arguments.ll
|
|
|
|
arm-asm.ll
|
|
|
|
arm-negative-stride.ll
|
Add nounwind to a few tests.
|
2009-05-18 15:16:49 +00:00 |
|
bits.ll
|
|
|
|
branch.ll
|
|
|
|
bx_fold.ll
|
|
|
|
call_nolink.ll
|
|
|
|
call.ll
|
|
|
|
clz.ll
|
|
|
|
compare-call.ll
|
|
|
|
constants.ll
|
Do not emit comments unless -asm-verbose.
|
2009-03-24 00:17:40 +00:00 |
|
cse-libcalls.ll
|
Split the Add, Sub, and Mul instruction opcodes into separate
|
2009-06-04 22:49:04 +00:00 |
|
ctors_dtors.ll
|
|
|
|
dg.exp
|
|
|
|
div.ll
|
|
|
|
dyn-stackalloc.ll
|
|
|
|
extloadi1.ll
|
|
|
|
fcopysign.ll
|
|
|
|
fixunsdfdi.ll
|
Split the Add, Sub, and Mul instruction opcodes into separate
|
2009-06-04 22:49:04 +00:00 |
|
fmdrr-fmrrd.ll
|
|
|
|
fnmul.ll
|
Split the Add, Sub, and Mul instruction opcodes into separate
|
2009-06-04 22:49:04 +00:00 |
|
formal.ll
|
Use CallConvLower.h and TableGen descriptions of the calling conventions
|
2009-04-17 19:07:39 +00:00 |
|
fp.ll
|
|
|
|
fparith.ll
|
Split the Add, Sub, and Mul instruction opcodes into separate
|
2009-06-04 22:49:04 +00:00 |
|
fpcmp_ueq.ll
|
|
|
|
fpcmp.ll
|
|
|
|
fpconv.ll
|
|
|
|
fpmem.ll
|
Split the Add, Sub, and Mul instruction opcodes into separate
|
2009-06-04 22:49:04 +00:00 |
|
fpow.ll
|
|
|
|
fpowi.ll
|
|
|
|
fptoint.ll
|
|
|
|
frame_thumb.ll
|
|
|
|
hello.ll
|
|
|
|
hidden-vis-2.ll
|
|
|
|
hidden-vis-3.ll
|
|
|
|
hidden-vis.ll
|
|
|
|
iabs.ll
|
|
|
|
ifcvt1.ll
|
|
|
|
ifcvt2.ll
|
|
|
|
ifcvt3.ll
|
|
|
|
ifcvt4.ll
|
|
|
|
ifcvt5.ll
|
|
|
|
ifcvt6.ll
|
|
|
|
ifcvt7.ll
|
|
|
|
ifcvt8.ll
|
|
|
|
ifcvt9.ll
|
ifcvt should ignore cfg where true and false successors are the same.
|
2009-06-15 21:24:34 +00:00 |
|
illegal-vector-bitcast.ll
|
Split the Add, Sub, and Mul instruction opcodes into separate
|
2009-06-04 22:49:04 +00:00 |
|
imm.ll
|
|
|
|
inlineasm2.ll
|
|
|
|
inlineasm-imm-arm.ll
|
Fix PR3862: Recognize some ARM-specific constraints for immediates in inline
|
2009-04-01 17:58:54 +00:00 |
|
inlineasm-imm-thumb.ll
|
Fix PR3862: Recognize some ARM-specific constraints for immediates in inline
|
2009-04-01 17:58:54 +00:00 |
|
inlineasm.ll
|
|
|
|
insn-sched1.ll
|
|
|
|
ispositive.ll
|
|
|
|
large-stack.ll
|
|
|
|
ldm.ll
|
|
|
|
ldr_ext.ll
|
|
|
|
ldr_frame.ll
|
|
|
|
ldr_post.ll
|
|
|
|
ldr_pre.ll
|
|
|
|
ldr.ll
|
|
|
|
ldrd.ll
|
Part 1.
|
2009-06-15 08:28:29 +00:00 |
|
load-global.ll
|
|
|
|
load.ll
|
|
|
|
long_shift.ll
|
|
|
|
long-setcc.ll
|
|
|
|
long.ll
|
Do not emit comments unless -asm-verbose.
|
2009-03-24 00:17:40 +00:00 |
|
lsr-code-insertion.ll
|
Mark some pattern-less instructions as neverHasSideEffects.
|
2009-06-12 20:46:18 +00:00 |
|
lsr-scale-addr-mode.ll
|
Changing allocation ordering from r3 ... r0 back to r0 ... r3. The order change no longer make sense after the coalescing changes we have made since then.
|
2009-06-05 19:08:58 +00:00 |
|
mem.ll
|
|
|
|
memcpy-inline.ll
|
Changing allocation ordering from r3 ... r0 back to r0 ... r3. The order change no longer make sense after the coalescing changes we have made since then.
|
2009-06-05 19:08:58 +00:00 |
|
memfunc.ll
|
|
|
|
mul.ll
|
|
|
|
mulhi.ll
|
|
|
|
mvn.ll
|
|
|
|
pack.ll
|
|
|
|
pr3502.ll
|
|
|
|
private.ll
|
|
|
|
remat.ll
|
|
|
|
ret0.ll
|
|
|
|
ret_arg1.ll
|
|
|
|
ret_arg2.ll
|
|
|
|
ret_arg3.ll
|
|
|
|
ret_arg4.ll
|
|
|
|
ret_arg5.ll
|
|
|
|
ret_f32_arg2.ll
|
Use CallConvLower.h and TableGen descriptions of the calling conventions
|
2009-04-17 19:07:39 +00:00 |
|
ret_f32_arg5.ll
|
Use CallConvLower.h and TableGen descriptions of the calling conventions
|
2009-04-17 19:07:39 +00:00 |
|
ret_f64_arg2.ll
|
Use CallConvLower.h and TableGen descriptions of the calling conventions
|
2009-04-17 19:07:39 +00:00 |
|
ret_f64_arg_reg_split.ll
|
Use CallConvLower.h and TableGen descriptions of the calling conventions
|
2009-04-17 19:07:39 +00:00 |
|
ret_f64_arg_split.ll
|
Use CallConvLower.h and TableGen descriptions of the calling conventions
|
2009-04-17 19:07:39 +00:00 |
|
ret_f64_arg_stack.ll
|
Use CallConvLower.h and TableGen descriptions of the calling conventions
|
2009-04-17 19:07:39 +00:00 |
|
ret_i64_arg2.ll
|
Use CallConvLower.h and TableGen descriptions of the calling conventions
|
2009-04-17 19:07:39 +00:00 |
|
ret_i64_arg3.ll
|
Use CallConvLower.h and TableGen descriptions of the calling conventions
|
2009-04-17 19:07:39 +00:00 |
|
ret_i64_arg_split.ll
|
Use CallConvLower.h and TableGen descriptions of the calling conventions
|
2009-04-17 19:07:39 +00:00 |
|
ret_i128_arg2.ll
|
Rename file to have the correct suffix.
|
2009-04-17 20:40:20 +00:00 |
|
ret_void.ll
|
|
|
|
rev.ll
|
|
|
|
section.ll
|
|
|
|
select_xform.ll
|
add no-unwind, remove duplicate run line.
|
2009-03-12 05:56:37 +00:00 |
|
select.ll
|
|
|
|
shifter_operand.ll
|
|
|
|
smul.ll
|
|
|
|
stack-frame.ll
|
|
|
|
stm.ll
|
Add a ARM specific pre-allocation pass that re-schedule loads / stores from
|
2009-06-13 09:12:55 +00:00 |
|
str_post.ll
|
|
|
|
str_pre-2.ll
|
Re-apply 72756 with fixes. One of those was introduced by we changed MachineInstrBuilder::addReg() interface.
|
2009-06-04 01:15:28 +00:00 |
|
str_pre.ll
|
|
|
|
str_trunc.ll
|
|
|
|
sxt_rot.ll
|
|
|
|
thread_pointer.ll
|
|
|
|
thumb-imm.ll
|
|
|
|
tls1.ll
|
|
|
|
tls2.ll
|
|
|
|
tls3.ll
|
|
|
|
trunc_ldr.ll
|
|
|
|
truncstore-dag-combine.ll
|
|
|
|
tst_teq.ll
|
|
|
|
uint64tof64.ll
|
|
|
|
unaligned_load_store.ll
|
|
|
|
unord.ll
|
|
|
|
uxt_rot.ll
|
|
|
|
uxtb.ll
|
|
|
|
vargs2.ll
|
|
|
|
vargs_align.ll
|
|
|
|
vargs.ll
|
|
|
|
vfp.ll
|
Split the Add, Sub, and Mul instruction opcodes into separate
|
2009-06-04 22:49:04 +00:00 |
|
weak2.ll
|
|
|
|
weak.ll
|
|
|
