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df4d5839d4
Full varargs support will depend on prologue/epilogue support, but this patch gets us started with most of the basic infrastructure. Differential Revision: http://reviews.llvm.org/D15231 llvm-svn: 254799
79 lines
2.8 KiB
C++
79 lines
2.8 KiB
C++
//===-- WebAssemblyRegisterInfo.cpp - WebAssembly Register Information ----===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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///
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/// \file
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/// \brief This file contains the WebAssembly implementation of the
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/// TargetRegisterInfo class.
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///
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//===----------------------------------------------------------------------===//
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#include "WebAssemblyRegisterInfo.h"
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#include "MCTargetDesc/WebAssemblyMCTargetDesc.h"
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#include "WebAssemblyFrameLowering.h"
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#include "WebAssemblyInstrInfo.h"
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#include "WebAssemblyMachineFunctionInfo.h"
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#include "WebAssemblySubtarget.h"
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#include "llvm/CodeGen/MachineFrameInfo.h"
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#include "llvm/CodeGen/MachineInstrBuilder.h"
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#include "llvm/CodeGen/MachineRegisterInfo.h"
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#include "llvm/IR/Function.h"
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#include "llvm/Support/raw_ostream.h"
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#include "llvm/Target/TargetFrameLowering.h"
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#include "llvm/Target/TargetOptions.h"
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using namespace llvm;
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#define DEBUG_TYPE "wasm-reg-info"
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#define GET_REGINFO_TARGET_DESC
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#include "WebAssemblyGenRegisterInfo.inc"
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WebAssemblyRegisterInfo::WebAssemblyRegisterInfo(const Triple &TT)
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: WebAssemblyGenRegisterInfo(0), TT(TT) {}
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const MCPhysReg *
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WebAssemblyRegisterInfo::getCalleeSavedRegs(const MachineFunction *) const {
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static const MCPhysReg CalleeSavedRegs[] = {0};
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return CalleeSavedRegs;
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}
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BitVector
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WebAssemblyRegisterInfo::getReservedRegs(const MachineFunction & /*MF*/) const {
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BitVector Reserved(getNumRegs());
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for (auto Reg : {WebAssembly::SP32, WebAssembly::SP64, WebAssembly::FP32,
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WebAssembly::FP64})
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Reserved.set(Reg);
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return Reserved;
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}
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void WebAssemblyRegisterInfo::eliminateFrameIndex(
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MachineBasicBlock::iterator /*II*/, int /*SPAdj*/,
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unsigned /*FIOperandNum*/, RegScavenger * /*RS*/) const {
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llvm_unreachable(
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"TODO: implement WebAssemblyRegisterInfo::eliminateFrameIndex");
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}
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unsigned
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WebAssemblyRegisterInfo::getFrameRegister(const MachineFunction &MF) const {
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static const unsigned Regs[2][2] = {
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/* !isArch64Bit isArch64Bit */
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/* !hasFP */ {WebAssembly::SP32, WebAssembly::SP64},
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/* hasFP */ {WebAssembly::FP32, WebAssembly::FP64}};
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const WebAssemblyFrameLowering *TFI = getFrameLowering(MF);
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return Regs[TFI->hasFP(MF)][TT.isArch64Bit()];
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}
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const TargetRegisterClass *
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WebAssemblyRegisterInfo::getPointerRegClass(const MachineFunction &MF,
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unsigned Kind) const {
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assert(Kind == 0 && "Only one kind of pointer on WebAssembly");
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if (MF.getSubtarget<WebAssemblySubtarget>().hasAddr64())
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return &WebAssembly::I64RegClass;
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return &WebAssembly::I32RegClass;
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}
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