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337 lines
12 KiB
C++
337 lines
12 KiB
C++
//===-- CodeGen/MachineInstBuilder.h - Simplify creation of MIs -*- C++ -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file exposes a function named BuildMI, which is useful for dramatically
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// simplifying how MachineInstr's are created. It allows use of code like this:
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//
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// M = BuildMI(X86::ADDrr8, 2).addReg(argVal1).addReg(argVal2);
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_CODEGEN_MACHINEINSTRBUILDER_H
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#define LLVM_CODEGEN_MACHINEINSTRBUILDER_H
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#include "llvm/CodeGen/MachineFunction.h"
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#include "llvm/Support/ErrorHandling.h"
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namespace llvm {
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class MCInstrDesc;
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class MDNode;
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namespace RegState {
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enum {
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Define = 0x2,
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Implicit = 0x4,
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Kill = 0x8,
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Dead = 0x10,
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Undef = 0x20,
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EarlyClobber = 0x40,
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Debug = 0x80,
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InternalRead = 0x100,
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DefineNoRead = Define | Undef,
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ImplicitDefine = Implicit | Define,
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ImplicitKill = Implicit | Kill
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};
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}
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class MachineInstrBuilder {
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MachineInstr *MI;
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public:
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MachineInstrBuilder() : MI(0) {}
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explicit MachineInstrBuilder(MachineInstr *mi) : MI(mi) {}
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/// Allow automatic conversion to the machine instruction we are working on.
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///
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operator MachineInstr*() const { return MI; }
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MachineInstr *operator->() const { return MI; }
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operator MachineBasicBlock::iterator() const { return MI; }
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/// addReg - Add a new virtual register operand...
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///
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const
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MachineInstrBuilder &addReg(unsigned RegNo, unsigned flags = 0,
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unsigned SubReg = 0) const {
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assert((flags & 0x1) == 0 &&
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"Passing in 'true' to addReg is forbidden! Use enums instead.");
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MI->addOperand(MachineOperand::CreateReg(RegNo,
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flags & RegState::Define,
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flags & RegState::Implicit,
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flags & RegState::Kill,
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flags & RegState::Dead,
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flags & RegState::Undef,
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flags & RegState::EarlyClobber,
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SubReg,
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flags & RegState::Debug,
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flags & RegState::InternalRead));
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return *this;
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}
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/// addImm - Add a new immediate operand.
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///
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const MachineInstrBuilder &addImm(int64_t Val) const {
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MI->addOperand(MachineOperand::CreateImm(Val));
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return *this;
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}
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const MachineInstrBuilder &addCImm(const ConstantInt *Val) const {
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MI->addOperand(MachineOperand::CreateCImm(Val));
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return *this;
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}
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const MachineInstrBuilder &addFPImm(const ConstantFP *Val) const {
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MI->addOperand(MachineOperand::CreateFPImm(Val));
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return *this;
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}
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const MachineInstrBuilder &addMBB(MachineBasicBlock *MBB,
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unsigned char TargetFlags = 0) const {
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MI->addOperand(MachineOperand::CreateMBB(MBB, TargetFlags));
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return *this;
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}
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const MachineInstrBuilder &addFrameIndex(int Idx) const {
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MI->addOperand(MachineOperand::CreateFI(Idx));
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return *this;
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}
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const MachineInstrBuilder &addConstantPoolIndex(unsigned Idx,
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int Offset = 0,
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unsigned char TargetFlags = 0) const {
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MI->addOperand(MachineOperand::CreateCPI(Idx, Offset, TargetFlags));
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return *this;
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}
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const MachineInstrBuilder &addTargetIndex(unsigned Idx, int64_t Offset = 0,
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unsigned char TargetFlags = 0) const {
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MI->addOperand(MachineOperand::CreateTargetIndex(Idx, Offset, TargetFlags));
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return *this;
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}
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const MachineInstrBuilder &addJumpTableIndex(unsigned Idx,
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unsigned char TargetFlags = 0) const {
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MI->addOperand(MachineOperand::CreateJTI(Idx, TargetFlags));
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return *this;
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}
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const MachineInstrBuilder &addGlobalAddress(const GlobalValue *GV,
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int64_t Offset = 0,
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unsigned char TargetFlags = 0) const {
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MI->addOperand(MachineOperand::CreateGA(GV, Offset, TargetFlags));
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return *this;
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}
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const MachineInstrBuilder &addExternalSymbol(const char *FnName,
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unsigned char TargetFlags = 0) const {
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MI->addOperand(MachineOperand::CreateES(FnName, TargetFlags));
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return *this;
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}
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const MachineInstrBuilder &addRegMask(const uint32_t *Mask) const {
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MI->addOperand(MachineOperand::CreateRegMask(Mask));
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return *this;
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}
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const MachineInstrBuilder &addMemOperand(MachineMemOperand *MMO) const {
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MI->addMemOperand(*MI->getParent()->getParent(), MMO);
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return *this;
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}
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const MachineInstrBuilder &setMemRefs(MachineInstr::mmo_iterator b,
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MachineInstr::mmo_iterator e) const {
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MI->setMemRefs(b, e);
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return *this;
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}
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const MachineInstrBuilder &addOperand(const MachineOperand &MO) const {
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MI->addOperand(MO);
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return *this;
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}
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const MachineInstrBuilder &addMetadata(const MDNode *MD) const {
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MI->addOperand(MachineOperand::CreateMetadata(MD));
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return *this;
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}
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const MachineInstrBuilder &addSym(MCSymbol *Sym) const {
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MI->addOperand(MachineOperand::CreateMCSymbol(Sym));
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return *this;
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}
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const MachineInstrBuilder &setMIFlags(unsigned Flags) const {
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MI->setFlags(Flags);
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return *this;
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}
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const MachineInstrBuilder &setMIFlag(MachineInstr::MIFlag Flag) const {
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MI->setFlag(Flag);
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return *this;
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}
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// Add a displacement from an existing MachineOperand with an added offset.
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const MachineInstrBuilder &addDisp(const MachineOperand &Disp, int64_t off,
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unsigned char TargetFlags = 0) const {
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switch (Disp.getType()) {
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default:
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llvm_unreachable("Unhandled operand type in addDisp()");
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case MachineOperand::MO_Immediate:
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return addImm(Disp.getImm() + off);
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case MachineOperand::MO_GlobalAddress: {
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// If caller specifies new TargetFlags then use it, otherwise the
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// default behavior is to copy the target flags from the existing
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// MachineOperand. This means if the caller wants to clear the
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// target flags it needs to do so explicitly.
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if (TargetFlags)
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return addGlobalAddress(Disp.getGlobal(), Disp.getOffset() + off,
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TargetFlags);
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return addGlobalAddress(Disp.getGlobal(), Disp.getOffset() + off,
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Disp.getTargetFlags());
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}
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}
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}
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};
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/// BuildMI - Builder interface. Specify how to create the initial instruction
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/// itself.
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///
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inline MachineInstrBuilder BuildMI(MachineFunction &MF,
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DebugLoc DL,
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const MCInstrDesc &MCID) {
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return MachineInstrBuilder(MF.CreateMachineInstr(MCID, DL));
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}
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/// BuildMI - This version of the builder sets up the first operand as a
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/// destination virtual register.
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///
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inline MachineInstrBuilder BuildMI(MachineFunction &MF,
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DebugLoc DL,
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const MCInstrDesc &MCID,
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unsigned DestReg) {
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return MachineInstrBuilder(MF.CreateMachineInstr(MCID, DL))
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.addReg(DestReg, RegState::Define);
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}
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/// BuildMI - This version of the builder inserts the newly-built
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/// instruction before the given position in the given MachineBasicBlock, and
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/// sets up the first operand as a destination virtual register.
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///
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inline MachineInstrBuilder BuildMI(MachineBasicBlock &BB,
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MachineBasicBlock::iterator I,
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DebugLoc DL,
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const MCInstrDesc &MCID,
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unsigned DestReg) {
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MachineInstr *MI = BB.getParent()->CreateMachineInstr(MCID, DL);
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BB.insert(I, MI);
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return MachineInstrBuilder(MI).addReg(DestReg, RegState::Define);
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}
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inline MachineInstrBuilder BuildMI(MachineBasicBlock &BB,
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MachineBasicBlock::instr_iterator I,
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DebugLoc DL,
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const MCInstrDesc &MCID,
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unsigned DestReg) {
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MachineInstr *MI = BB.getParent()->CreateMachineInstr(MCID, DL);
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BB.insert(I, MI);
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return MachineInstrBuilder(MI).addReg(DestReg, RegState::Define);
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}
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inline MachineInstrBuilder BuildMI(MachineBasicBlock &BB,
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MachineInstr *I,
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DebugLoc DL,
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const MCInstrDesc &MCID,
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unsigned DestReg) {
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if (I->isInsideBundle()) {
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MachineBasicBlock::instr_iterator MII = I;
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return BuildMI(BB, MII, DL, MCID, DestReg);
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}
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MachineBasicBlock::iterator MII = I;
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return BuildMI(BB, MII, DL, MCID, DestReg);
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}
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/// BuildMI - This version of the builder inserts the newly-built
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/// instruction before the given position in the given MachineBasicBlock, and
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/// does NOT take a destination register.
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///
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inline MachineInstrBuilder BuildMI(MachineBasicBlock &BB,
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MachineBasicBlock::iterator I,
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DebugLoc DL,
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const MCInstrDesc &MCID) {
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MachineInstr *MI = BB.getParent()->CreateMachineInstr(MCID, DL);
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BB.insert(I, MI);
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return MachineInstrBuilder(MI);
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}
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inline MachineInstrBuilder BuildMI(MachineBasicBlock &BB,
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MachineBasicBlock::instr_iterator I,
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DebugLoc DL,
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const MCInstrDesc &MCID) {
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MachineInstr *MI = BB.getParent()->CreateMachineInstr(MCID, DL);
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BB.insert(I, MI);
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return MachineInstrBuilder(MI);
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}
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inline MachineInstrBuilder BuildMI(MachineBasicBlock &BB,
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MachineInstr *I,
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DebugLoc DL,
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const MCInstrDesc &MCID) {
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if (I->isInsideBundle()) {
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MachineBasicBlock::instr_iterator MII = I;
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return BuildMI(BB, MII, DL, MCID);
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}
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MachineBasicBlock::iterator MII = I;
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return BuildMI(BB, MII, DL, MCID);
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}
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/// BuildMI - This version of the builder inserts the newly-built
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/// instruction at the end of the given MachineBasicBlock, and does NOT take a
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/// destination register.
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///
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inline MachineInstrBuilder BuildMI(MachineBasicBlock *BB,
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DebugLoc DL,
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const MCInstrDesc &MCID) {
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return BuildMI(*BB, BB->end(), DL, MCID);
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}
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/// BuildMI - This version of the builder inserts the newly-built
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/// instruction at the end of the given MachineBasicBlock, and sets up the first
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/// operand as a destination virtual register.
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///
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inline MachineInstrBuilder BuildMI(MachineBasicBlock *BB,
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DebugLoc DL,
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const MCInstrDesc &MCID,
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unsigned DestReg) {
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return BuildMI(*BB, BB->end(), DL, MCID, DestReg);
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}
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inline unsigned getDefRegState(bool B) {
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return B ? RegState::Define : 0;
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}
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inline unsigned getImplRegState(bool B) {
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return B ? RegState::Implicit : 0;
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}
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inline unsigned getKillRegState(bool B) {
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return B ? RegState::Kill : 0;
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}
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inline unsigned getDeadRegState(bool B) {
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return B ? RegState::Dead : 0;
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}
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inline unsigned getUndefRegState(bool B) {
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return B ? RegState::Undef : 0;
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}
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inline unsigned getInternalReadRegState(bool B) {
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return B ? RegState::InternalRead : 0;
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}
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} // End llvm namespace
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#endif
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