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74be1319be
AMDGPU normally spills SGPRs to VGPRs. Previously, since all register classes are handled at the same time, this was problematic. We don't know ahead of time how many registers will be needed to be reserved to handle the spilling. If no VGPRs were left for spilling, we would have to try to spill to memory. If the spilled SGPRs were required for exec mask manipulation, it is highly problematic because the lanes active at the point of spill are not necessarily the same as at the restore point. Avoid this problem by fully allocating SGPRs in a separate regalloc run from VGPRs. This way we know the exact number of VGPRs needed, and can reserve them for a second run. This fixes the most serious issues, but it is still possible using inline asm to make all VGPRs unavailable. Start erroring in the case where we ever would require memory for an SGPR spill. This is implemented by giving each regalloc pass a callback which reports if a register class should be handled or not. A few passes need some small changes to deal with leftover virtual registers. In the AMDGPU implementation, a new pass is introduced to take the place of PrologEpilogInserter for SGPR spills emitted during the first run. One disadvantage of this is currently StackSlotColoring is no longer used for SGPR spills. It would need to be run again, which will require more work. Error if the standard -regalloc option is used. Introduce new separate -sgpr-regalloc and -vgpr-regalloc flags, so the two runs can be controlled individually. PBQB is not currently supported, so this also prevents using the unhandled allocator.
239 lines
8.2 KiB
YAML
239 lines
8.2 KiB
YAML
# RUN: llc -march=amdgcn -mcpu=gfx90a -start-before=greedy,0 -stop-after=virtregrewriter,1 -verify-machineinstrs -o - %s | FileCheck --check-prefixes=GCN,GFX90A %s
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# Using the unaligned vector tuples are OK as long as they aren't used
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# in a real instruction.
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---
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# GCN-LABEL: name: alloc_vgpr_64
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# GFX90A: $vgpr4_vgpr5 = GLOBAL_LOAD
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name: alloc_vgpr_64
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tracksRegLiveness: true
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liveins:
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- { reg: '$vgpr0_vgpr1' }
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- { reg: '$vgpr2' }
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body: |
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bb.0:
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liveins: $vgpr0_vgpr1, $vgpr2
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%0:vreg_64_align2 = COPY $vgpr0_vgpr1
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%1:vgpr_32 = COPY $vgpr2
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%2:vreg_64_align2 = GLOBAL_LOAD_DWORDX2 %0, 0, 0, implicit $exec
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GLOBAL_STORE_DWORDX2 %0, %2, 0, 0, implicit $exec
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GLOBAL_STORE_DWORD %0, %1, 0, 0, implicit $exec
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...
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---
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# GCN-LABEL: name: alloc_vgpr_96
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# GFX90A: $vgpr4_vgpr5_vgpr6 = GLOBAL_LOAD
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name: alloc_vgpr_96
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tracksRegLiveness: true
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liveins:
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- { reg: '$vgpr0_vgpr1' }
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- { reg: '$vgpr2' }
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body: |
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bb.0:
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liveins: $vgpr0_vgpr1, $vgpr2
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%0:vreg_64_align2 = COPY $vgpr0_vgpr1
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%1:vgpr_32 = COPY $vgpr2
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%2:vreg_96_align2 = GLOBAL_LOAD_DWORDX3 %0, 0, 0, implicit $exec
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GLOBAL_STORE_DWORDX3 %0, %2, 0, 0, implicit $exec
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GLOBAL_STORE_DWORD %0, %1, 0, 0, implicit $exec
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...
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---
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# GCN-LABEL: name: alloc_vgpr_128
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# GFX90A: $vgpr4_vgpr5_vgpr6_vgpr7 = GLOBAL_LOAD
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name: alloc_vgpr_128
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tracksRegLiveness: true
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liveins:
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- { reg: '$vgpr0_vgpr1' }
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- { reg: '$vgpr2' }
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body: |
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bb.0:
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liveins: $vgpr0_vgpr1, $vgpr2
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%0:vreg_64_align2 = COPY $vgpr0_vgpr1
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%1:vgpr_32 = COPY $vgpr2
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%2:vreg_128_align2 = GLOBAL_LOAD_DWORDX4 %0, 0, 0, implicit $exec
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GLOBAL_STORE_DWORDX4 %0, %2, 0, 0, implicit $exec
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GLOBAL_STORE_DWORD %0, %1, 0, 0, implicit $exec
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...
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---
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# GCN-LABEL: name: alloc_vgpr_160
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# GFX90A: $vgpr4_vgpr5_vgpr6_vgpr7_vgpr8 = IMAGE_LOAD
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name: alloc_vgpr_160
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tracksRegLiveness: true
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liveins:
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- { reg: '$vgpr0_vgpr1' }
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- { reg: '$vgpr2' }
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body: |
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bb.0:
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liveins: $vgpr0_vgpr1, $vgpr2
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%0:vreg_64_align2 = COPY $vgpr0_vgpr1
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%1:vgpr_32 = COPY $vgpr2
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%2:vreg_160_align2 = IMAGE_LOAD_V5_V1 %1, undef %3:sgpr_256, 0, 0, 0, 0, 0, 1, 0, 0, implicit $exec :: (dereferenceable load (s32), addrspace 4)
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GLOBAL_STORE_DWORDX4 %0, %2.sub0_sub1_sub2_sub3, 0, 0, implicit $exec
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GLOBAL_STORE_DWORD %0, %1, 0, 0, implicit $exec
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...
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---
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# GCN-LABEL: name: alloc_vgpr_256
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# GFX90A: $vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11 = COPY
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name: alloc_vgpr_256
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tracksRegLiveness: true
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liveins:
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- { reg: '$vgpr0_vgpr1' }
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- { reg: '$vgpr2' }
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body: |
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bb.0:
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liveins: $vgpr0_vgpr1, $vgpr2
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%0:vreg_64_align2 = COPY $vgpr0_vgpr1
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%1:vgpr_32 = COPY $vgpr2
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%3:sgpr_256 = IMPLICIT_DEF
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%2:vreg_256_align2 = COPY %3:sgpr_256
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%4:vreg_128_align2 = IMAGE_SAMPLE_C_CL_O_V4_V8 %2, %3:sgpr_256, undef %5:sgpr_128, 0, 0, 0, 0, 0, 0, 0, 0, implicit $exec :: (dereferenceable load (s32), addrspace 4)
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GLOBAL_STORE_DWORDX4 %0, %2.sub0_sub1_sub2_sub3, 0, 0, implicit $exec
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GLOBAL_STORE_DWORD %0, %1, 0, 0, implicit $exec
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...
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---
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# GCN-LABEL: name: alloc_vgpr_512
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# GFX90A: $vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16_vgpr17_vgpr18_vgpr19 = IMPLICIT_DEF
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name: alloc_vgpr_512
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tracksRegLiveness: true
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liveins:
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- { reg: '$vgpr0_vgpr1' }
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- { reg: '$vgpr2' }
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body: |
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bb.0:
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liveins: $vgpr0_vgpr1, $vgpr2
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%0:vreg_64_align2 = COPY $vgpr0_vgpr1
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%1:vgpr_32 = COPY $vgpr2
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%2:vreg_512_align2 = IMPLICIT_DEF
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GLOBAL_STORE_DWORDX4 %0, %2.sub0_sub1_sub2_sub3, 0, 0, implicit $exec
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GLOBAL_STORE_DWORDX4 %0, %2.sub4_sub5_sub6_sub7, 0, 0, implicit $exec
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GLOBAL_STORE_DWORDX4 %0, %2.sub8_sub9_sub10_sub11, 0, 0, implicit $exec
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GLOBAL_STORE_DWORDX4 %0, %2.sub12_sub13_sub14_sub15, 0, 0, implicit $exec
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GLOBAL_STORE_DWORD %0, %1, 0, 0, implicit $exec
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...
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---
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# GCN-LABEL: name: alloc_vgpr_1024
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# GFX90A: $vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31_vgpr32_vgpr33_vgpr34_vgpr35 = IMPLICIT_DEF
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name: alloc_vgpr_1024
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tracksRegLiveness: true
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liveins:
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- { reg: '$vgpr0_vgpr1' }
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- { reg: '$vgpr2' }
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body: |
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bb.0:
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liveins: $vgpr0_vgpr1, $vgpr2
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%0:vreg_64_align2 = COPY $vgpr0_vgpr1
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%1:vgpr_32 = COPY $vgpr2
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%2:vreg_1024_align2 = IMPLICIT_DEF
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GLOBAL_STORE_DWORDX4 %0, %2.sub0_sub1_sub2_sub3, 0, 0, implicit $exec
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GLOBAL_STORE_DWORDX4 %0, %2.sub4_sub5_sub6_sub7, 0, 0, implicit $exec
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GLOBAL_STORE_DWORDX4 %0, %2.sub8_sub9_sub10_sub11, 0, 0, implicit $exec
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GLOBAL_STORE_DWORDX4 %0, %2.sub12_sub13_sub14_sub15, 0, 0, implicit $exec
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GLOBAL_STORE_DWORDX4 %0, %2.sub16_sub17_sub18_sub19, 0, 0, implicit $exec
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GLOBAL_STORE_DWORDX4 %0, %2.sub20_sub21_sub22_sub23, 0, 0, implicit $exec
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GLOBAL_STORE_DWORDX4 %0, %2.sub24_sub25_sub26_sub27, 0, 0, implicit $exec
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GLOBAL_STORE_DWORDX4 %0, %2.sub28_sub29_sub30_sub31, 0, 0, implicit $exec
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GLOBAL_STORE_DWORD %0, %1, 0, 0, implicit $exec
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...
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---
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# GCN-LABEL: name: alloc_agpr_64
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# GFX90A: $agpr1_agpr2 = IMPLICIT_DEF
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name: alloc_agpr_64
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tracksRegLiveness: true
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liveins:
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- { reg: '$vgpr0_vgpr1' }
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- { reg: '$agpr0' }
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body: |
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bb.0:
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liveins: $vgpr0_vgpr1, $agpr0
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%0:vreg_64_align2 = COPY $vgpr0_vgpr1
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%3:areg_64 = IMPLICIT_DEF
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%2:vreg_64_align2 = COPY %3:areg_64
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GLOBAL_STORE_DWORDX2 %0, %2, 0, 0, implicit $exec
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%1:vgpr_32 = COPY $agpr0
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GLOBAL_STORE_DWORD %0, %1, 0, 0, implicit $exec
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...
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---
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# GCN-LABEL: name: alloc_agpr_128
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# GFX90A: $agpr1_agpr2_agpr3_agpr4 = IMPLICIT_DEF
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name: alloc_agpr_128
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tracksRegLiveness: true
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liveins:
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- { reg: '$vgpr0_vgpr1' }
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- { reg: '$agpr0' }
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body: |
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bb.0:
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liveins: $vgpr0_vgpr1, $agpr0
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%0:vreg_64_align2 = COPY $vgpr0_vgpr1
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%3:areg_128 = IMPLICIT_DEF
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%2:vreg_128_align2 = COPY %3:areg_128
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GLOBAL_STORE_DWORDX4 %0, %2, 0, 0, implicit $exec
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%1:vgpr_32 = COPY $agpr0
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GLOBAL_STORE_DWORD %0, %1, 0, 0, implicit $exec
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...
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---
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# GCN-LABEL: name: alloc_agpr_512
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# GFX90A: $agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15_agpr16 = IMPLICIT_DEF
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name: alloc_agpr_512
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tracksRegLiveness: true
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liveins:
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- { reg: '$vgpr0_vgpr1' }
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- { reg: '$agpr0' }
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body: |
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bb.0:
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liveins: $vgpr0_vgpr1, $agpr0
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%0:vreg_64_align2 = COPY $vgpr0_vgpr1
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%3:areg_512 = IMPLICIT_DEF
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%2:vreg_512_align2 = COPY %3:areg_512
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GLOBAL_STORE_DWORDX4 %0, %2.sub0_sub1_sub2_sub3, 0, 0, implicit $exec
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GLOBAL_STORE_DWORDX4 %0, %2.sub4_sub5_sub6_sub7, 0, 0, implicit $exec
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GLOBAL_STORE_DWORDX4 %0, %2.sub8_sub9_sub10_sub11, 0, 0, implicit $exec
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GLOBAL_STORE_DWORDX4 %0, %2.sub12_sub13_sub14_sub15, 0, 0, implicit $exec
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%1:vgpr_32 = COPY $agpr0
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GLOBAL_STORE_DWORD %0, %1, 0, 0, implicit $exec
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...
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---
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# GCN-LABEL: name: alloc_agpr_1024
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# GFX90A: $agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15_agpr16_agpr17_agpr18_agpr19_agpr20_agpr21_agpr22_agpr23_agpr24_agpr25_agpr26_agpr27_agpr28_agpr29_agpr30_agpr31_agpr32 = IMPLICIT_DEF
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name: alloc_agpr_1024
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tracksRegLiveness: true
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liveins:
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- { reg: '$vgpr0_vgpr1' }
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- { reg: '$agpr0' }
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body: |
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bb.0:
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liveins: $vgpr0_vgpr1, $agpr0
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%0:vreg_64_align2 = COPY $vgpr0_vgpr1
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%3:areg_1024 = IMPLICIT_DEF
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%2:vreg_1024_align2 = COPY %3:areg_1024
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GLOBAL_STORE_DWORDX4 %0, %2.sub0_sub1_sub2_sub3, 0, 0, implicit $exec
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GLOBAL_STORE_DWORDX4 %0, %2.sub4_sub5_sub6_sub7, 0, 0, implicit $exec
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GLOBAL_STORE_DWORDX4 %0, %2.sub8_sub9_sub10_sub11, 0, 0, implicit $exec
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GLOBAL_STORE_DWORDX4 %0, %2.sub12_sub13_sub14_sub15, 0, 0, implicit $exec
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GLOBAL_STORE_DWORDX4 %0, %2.sub16_sub17_sub18_sub19, 0, 0, implicit $exec
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GLOBAL_STORE_DWORDX4 %0, %2.sub20_sub21_sub22_sub23, 0, 0, implicit $exec
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GLOBAL_STORE_DWORDX4 %0, %2.sub24_sub25_sub26_sub27, 0, 0, implicit $exec
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GLOBAL_STORE_DWORDX4 %0, %2.sub28_sub29_sub30_sub31, 0, 0, implicit $exec
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%1:vgpr_32 = COPY $agpr0
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GLOBAL_STORE_DWORD %0, %1, 0, 0, implicit $exec
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...
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