mirror of
https://github.com/RPCS3/llvm-mirror.git
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cc12b285b6
This will currently accept the old number of bytes syntax, and convert it to a scalar. This should be removed in the near future (I think I converted all of the tests already, but likely missed a few). Not sure what the exact syntax and policy should be. We can continue printing the number of bytes for non-generic instructions to avoid test churn and only allow non-scalar types for generic instructions. This will currently print the LLT in parentheses, but accept parsing the existing integers and implicitly converting to scalar. The parentheses are a bit ugly, but the parser logic seems unable to deal without either parentheses or some keyword to indicate the start of a type.
413 lines
15 KiB
YAML
413 lines
15 KiB
YAML
# RUN: llc -march=amdgcn -verify-machineinstrs -run-pass si-fold-operands %s -o - | FileCheck -check-prefix=GCN %s
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---
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# GCN-LABEL: name: v_max_self_clamp_not_set_f32
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# GCN: %20:vgpr_32 = V_ADD_F32_e64 0, killed %17, 0, 1065353216, 0, 0, implicit $mode, implicit $exec
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# GCN-NEXT: %21:vgpr_32 = V_MAX_F32_e64 0, killed %20, 0, killed %20, 0, 0, implicit $mode, implicit $exec
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name: v_max_self_clamp_not_set_f32
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tracksRegLiveness: true
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registers:
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- { id: 0, class: sgpr_64 }
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- { id: 1, class: sreg_32_xm0 }
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- { id: 2, class: sgpr_32 }
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- { id: 3, class: vgpr_32 }
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- { id: 4, class: sreg_64_xexec }
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- { id: 5, class: sreg_64_xexec }
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- { id: 6, class: sreg_32 }
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- { id: 7, class: sreg_32 }
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- { id: 8, class: sreg_32_xm0 }
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- { id: 9, class: sreg_64 }
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- { id: 10, class: sreg_32_xm0 }
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- { id: 11, class: sreg_32_xm0 }
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- { id: 12, class: sgpr_64 }
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- { id: 13, class: sgpr_128 }
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- { id: 14, class: sreg_32_xm0 }
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- { id: 15, class: sreg_64 }
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- { id: 16, class: sgpr_128 }
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- { id: 17, class: vgpr_32 }
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- { id: 18, class: vreg_64 }
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- { id: 19, class: vgpr_32 }
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- { id: 20, class: vgpr_32 }
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- { id: 21, class: vgpr_32 }
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- { id: 22, class: vgpr_32 }
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- { id: 23, class: vreg_64 }
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- { id: 24, class: vgpr_32 }
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- { id: 25, class: vreg_64 }
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- { id: 26, class: vreg_64 }
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liveins:
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- { reg: '$sgpr0_sgpr1', virtual-reg: '%0' }
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- { reg: '$vgpr0', virtual-reg: '%3' }
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body: |
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bb.0:
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liveins: $sgpr0_sgpr1, $vgpr0
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%3 = COPY $vgpr0
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%0 = COPY $sgpr0_sgpr1
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%4 = S_LOAD_DWORDX2_IMM %0, 9, 0 :: (non-temporal dereferenceable invariant load (s64) from `i64 addrspace(4)* undef`)
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%5 = S_LOAD_DWORDX2_IMM %0, 11, 0 :: (non-temporal dereferenceable invariant load (s64) from `i64 addrspace(4)* undef`)
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%24 = V_ASHRREV_I32_e32 31, %3, implicit $exec
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%25 = REG_SEQUENCE %3, 1, %24, 2
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%10 = S_MOV_B32 61440
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%11 = S_MOV_B32 0
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%12 = REG_SEQUENCE killed %11, 1, killed %10, 2
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%13 = REG_SEQUENCE killed %5, 17, %12, 18
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%14 = S_MOV_B32 2
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%26 = V_LSHL_B64_e64 killed %25, 2, implicit $exec
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%16 = REG_SEQUENCE killed %4, 17, %12, 18
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%18 = COPY %26
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%17 = BUFFER_LOAD_DWORD_ADDR64 %26, killed %13, 0, 0, 0, 0, 0, implicit $exec
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%20 = V_ADD_F32_e64 0, killed %17, 0, 1065353216, 0, 0, implicit $mode, implicit $exec
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%21 = V_MAX_F32_e64 0, killed %20, 0, killed %20, 0, 0, implicit $mode, implicit $exec
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BUFFER_STORE_DWORD_ADDR64 killed %21, %26, killed %16, 0, 0, 0, 0, 0, implicit $exec
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S_ENDPGM 0
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...
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---
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# GCN-LABEL: name: v_clamp_omod_already_set_f32
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# GCN: %20:vgpr_32 = V_ADD_F32_e64 0, killed %17, 0, 1065353216, 0, 0, implicit $mode, implicit $exec
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# GCN: %21:vgpr_32 = V_MAX_F32_e64 0, killed %20, 0, killed %20, 1, 3, implicit $mode, implicit $exec
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name: v_clamp_omod_already_set_f32
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tracksRegLiveness: true
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registers:
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- { id: 0, class: sgpr_64 }
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- { id: 1, class: sreg_32_xm0 }
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- { id: 2, class: sgpr_32 }
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- { id: 3, class: vgpr_32 }
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- { id: 4, class: sreg_64_xexec }
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- { id: 5, class: sreg_64_xexec }
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- { id: 6, class: sreg_32 }
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- { id: 7, class: sreg_32 }
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- { id: 8, class: sreg_32_xm0 }
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- { id: 9, class: sreg_64 }
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- { id: 10, class: sreg_32_xm0 }
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- { id: 11, class: sreg_32_xm0 }
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- { id: 12, class: sgpr_64 }
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- { id: 13, class: sgpr_128 }
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- { id: 14, class: sreg_32_xm0 }
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- { id: 15, class: sreg_64 }
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- { id: 16, class: sgpr_128 }
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- { id: 17, class: vgpr_32 }
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- { id: 18, class: vreg_64 }
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- { id: 19, class: vgpr_32 }
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- { id: 20, class: vgpr_32 }
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- { id: 21, class: vgpr_32 }
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- { id: 22, class: vgpr_32 }
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- { id: 23, class: vreg_64 }
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- { id: 24, class: vgpr_32 }
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- { id: 25, class: vreg_64 }
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- { id: 26, class: vreg_64 }
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liveins:
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- { reg: '$sgpr0_sgpr1', virtual-reg: '%0' }
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- { reg: '$vgpr0', virtual-reg: '%3' }
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body: |
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bb.0:
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liveins: $sgpr0_sgpr1, $vgpr0
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%3 = COPY $vgpr0
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%0 = COPY $sgpr0_sgpr1
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%4 = S_LOAD_DWORDX2_IMM %0, 9, 0 :: (non-temporal dereferenceable invariant load (s64) from `i64 addrspace(4)* undef`)
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%5 = S_LOAD_DWORDX2_IMM %0, 11, 0 :: (non-temporal dereferenceable invariant load (s64) from `i64 addrspace(4)* undef`)
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%24 = V_ASHRREV_I32_e32 31, %3, implicit $exec
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%25 = REG_SEQUENCE %3, 1, %24, 2
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%10 = S_MOV_B32 61440
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%11 = S_MOV_B32 0
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%12 = REG_SEQUENCE killed %11, 1, killed %10, 2
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%13 = REG_SEQUENCE killed %5, 17, %12, 18
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%14 = S_MOV_B32 2
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%26 = V_LSHL_B64_e64 killed %25, 2, implicit $exec
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%16 = REG_SEQUENCE killed %4, 17, %12, 18
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%18 = COPY %26
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%17 = BUFFER_LOAD_DWORD_ADDR64 %26, killed %13, 0, 0, 0, 0, 0, implicit $exec
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%20 = V_ADD_F32_e64 0, killed %17, 0, 1065353216, 0, 0, implicit $mode, implicit $exec
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%21 = V_MAX_F32_e64 0, killed %20, 0, killed %20, 1, 3, implicit $mode, implicit $exec
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BUFFER_STORE_DWORD_ADDR64 killed %21, %26, killed %16, 0, 0, 0, 0, 0, implicit $exec
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S_ENDPGM 0
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...
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---
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# Don't fold a mul that looks like an omod if itself has omod set
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# GCN-LABEL: name: v_omod_mul_omod_already_set_f32
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# GCN: %20:vgpr_32 = V_ADD_F32_e64 0, killed %17, 0, 1065353216, 0, 0, implicit $mode, implicit $exec
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# GCN-NEXT: %21:vgpr_32 = V_MUL_F32_e64 0, killed %20, 0, 1056964608, 0, 3, implicit $mode, implicit $exec
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name: v_omod_mul_omod_already_set_f32
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tracksRegLiveness: true
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registers:
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- { id: 0, class: sgpr_64 }
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- { id: 1, class: sreg_32_xm0 }
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- { id: 2, class: sgpr_32 }
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- { id: 3, class: vgpr_32 }
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- { id: 4, class: sreg_64_xexec }
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- { id: 5, class: sreg_64_xexec }
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- { id: 6, class: sreg_32 }
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- { id: 7, class: sreg_32 }
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- { id: 8, class: sreg_32_xm0 }
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- { id: 9, class: sreg_64 }
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- { id: 10, class: sreg_32_xm0 }
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- { id: 11, class: sreg_32_xm0 }
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- { id: 12, class: sgpr_64 }
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- { id: 13, class: sgpr_128 }
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- { id: 14, class: sreg_32_xm0 }
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- { id: 15, class: sreg_64 }
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- { id: 16, class: sgpr_128 }
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- { id: 17, class: vgpr_32 }
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- { id: 18, class: vreg_64 }
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- { id: 19, class: vgpr_32 }
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- { id: 20, class: vgpr_32 }
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- { id: 21, class: vgpr_32 }
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- { id: 22, class: vgpr_32 }
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- { id: 23, class: vreg_64 }
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- { id: 24, class: vgpr_32 }
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- { id: 25, class: vreg_64 }
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- { id: 26, class: vreg_64 }
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liveins:
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- { reg: '$sgpr0_sgpr1', virtual-reg: '%0' }
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- { reg: '$vgpr0', virtual-reg: '%3' }
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body: |
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bb.0:
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liveins: $sgpr0_sgpr1, $vgpr0
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%3 = COPY $vgpr0
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%0 = COPY $sgpr0_sgpr1
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%4 = S_LOAD_DWORDX2_IMM %0, 9, 0 :: (non-temporal dereferenceable invariant load (s64) from `i64 addrspace(4)* undef`)
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%5 = S_LOAD_DWORDX2_IMM %0, 11, 0 :: (non-temporal dereferenceable invariant load (s64) from `i64 addrspace(4)* undef`)
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%24 = V_ASHRREV_I32_e32 31, %3, implicit $exec
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%25 = REG_SEQUENCE %3, 1, %24, 2
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%10 = S_MOV_B32 61440
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%11 = S_MOV_B32 0
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%12 = REG_SEQUENCE killed %11, 1, killed %10, 2
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%13 = REG_SEQUENCE killed %5, 17, %12, 18
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%14 = S_MOV_B32 2
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%26 = V_LSHL_B64_e64 killed %25, 2, implicit $exec
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%16 = REG_SEQUENCE killed %4, 17, %12, 18
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%18 = COPY %26
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%17 = BUFFER_LOAD_DWORD_ADDR64 %26, killed %13, 0, 0, 0, 0, 0, implicit $exec
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%20 = V_ADD_F32_e64 0, killed %17, 0, 1065353216, 0, 0, implicit $mode, implicit $exec
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%21 = V_MUL_F32_e64 0, killed %20, 0, 1056964608, 0, 3, implicit $mode, implicit $exec
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BUFFER_STORE_DWORD_ADDR64 killed %21, %26, killed %16, 0, 0, 0, 0, 0, implicit $exec
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S_ENDPGM 0
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...
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---
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# Don't fold a mul that looks like an omod if itself has clamp set
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# This might be OK, but would require folding the clamp at the same time.
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# GCN-LABEL: name: v_omod_mul_clamp_already_set_f32
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# GCN: %20:vgpr_32 = V_ADD_F32_e64 0, killed %17, 0, 1065353216, 0, 0, implicit $mode, implicit $exec
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# GCN-NEXT: %21:vgpr_32 = V_MUL_F32_e64 0, killed %20, 0, 1056964608, 1, 0, implicit $mode, implicit $exec
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name: v_omod_mul_clamp_already_set_f32
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tracksRegLiveness: true
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registers:
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- { id: 0, class: sgpr_64 }
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- { id: 1, class: sreg_32_xm0 }
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- { id: 2, class: sgpr_32 }
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- { id: 3, class: vgpr_32 }
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- { id: 4, class: sreg_64_xexec }
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- { id: 5, class: sreg_64_xexec }
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- { id: 6, class: sreg_32 }
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- { id: 7, class: sreg_32 }
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- { id: 8, class: sreg_32_xm0 }
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- { id: 9, class: sreg_64 }
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- { id: 10, class: sreg_32_xm0 }
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- { id: 11, class: sreg_32_xm0 }
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- { id: 12, class: sgpr_64 }
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- { id: 13, class: sgpr_128 }
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- { id: 14, class: sreg_32_xm0 }
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- { id: 15, class: sreg_64 }
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- { id: 16, class: sgpr_128 }
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- { id: 17, class: vgpr_32 }
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- { id: 18, class: vreg_64 }
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- { id: 19, class: vgpr_32 }
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- { id: 20, class: vgpr_32 }
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- { id: 21, class: vgpr_32 }
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- { id: 22, class: vgpr_32 }
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- { id: 23, class: vreg_64 }
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- { id: 24, class: vgpr_32 }
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- { id: 25, class: vreg_64 }
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- { id: 26, class: vreg_64 }
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liveins:
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- { reg: '$sgpr0_sgpr1', virtual-reg: '%0' }
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- { reg: '$vgpr0', virtual-reg: '%3' }
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body: |
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bb.0:
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liveins: $sgpr0_sgpr1, $vgpr0
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%3 = COPY $vgpr0
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%0 = COPY $sgpr0_sgpr1
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%4 = S_LOAD_DWORDX2_IMM %0, 9, 0 :: (non-temporal dereferenceable invariant load (s64) from `i64 addrspace(4)* undef`)
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%5 = S_LOAD_DWORDX2_IMM %0, 11, 0 :: (non-temporal dereferenceable invariant load (s64) from `i64 addrspace(4)* undef`)
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%24 = V_ASHRREV_I32_e32 31, %3, implicit $exec
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%25 = REG_SEQUENCE %3, 1, %24, 2
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%10 = S_MOV_B32 61440
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%11 = S_MOV_B32 0
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%12 = REG_SEQUENCE killed %11, 1, killed %10, 2
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%13 = REG_SEQUENCE killed %5, 17, %12, 18
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%14 = S_MOV_B32 2
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%26 = V_LSHL_B64_e64 killed %25, 2, implicit $exec
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%16 = REG_SEQUENCE killed %4, 17, %12, 18
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%18 = COPY %26
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%17 = BUFFER_LOAD_DWORD_ADDR64 %26, killed %13, 0, 0, 0, 0, 0, implicit $exec
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%20 = V_ADD_F32_e64 0, killed %17, 0, 1065353216, 0, 0, implicit $mode, implicit $exec
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%21 = V_MUL_F32_e64 0, killed %20, 0, 1056964608, 1, 0, implicit $mode, implicit $exec
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BUFFER_STORE_DWORD_ADDR64 killed %21, %26, killed %16, 0, 0, 0, 0, 0, implicit $exec
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S_ENDPGM 0
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...
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---
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# Don't fold a mul that looks like an omod if itself has omod set
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# GCN-LABEL: name: v_omod_add_omod_already_set_f32
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# GCN: %20:vgpr_32 = V_ADD_F32_e64 0, killed %17, 0, 1065353216, 0, 0, implicit $mode, implicit $exec
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# GCN-NEXT: %21:vgpr_32 = V_ADD_F32_e64 0, killed %20, 0, killed %20, 0, 3, implicit $mode, implicit $exec
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name: v_omod_add_omod_already_set_f32
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tracksRegLiveness: true
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registers:
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- { id: 0, class: sgpr_64 }
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- { id: 1, class: sreg_32_xm0 }
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- { id: 2, class: sgpr_32 }
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- { id: 3, class: vgpr_32 }
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- { id: 4, class: sreg_64_xexec }
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- { id: 5, class: sreg_64_xexec }
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- { id: 6, class: sreg_32 }
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- { id: 7, class: sreg_32 }
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- { id: 8, class: sreg_32_xm0 }
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- { id: 9, class: sreg_64 }
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- { id: 10, class: sreg_32_xm0 }
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- { id: 11, class: sreg_32_xm0 }
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- { id: 12, class: sgpr_64 }
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- { id: 13, class: sgpr_128 }
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- { id: 14, class: sreg_32_xm0 }
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- { id: 15, class: sreg_64 }
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- { id: 16, class: sgpr_128 }
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- { id: 17, class: vgpr_32 }
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- { id: 18, class: vreg_64 }
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- { id: 19, class: vgpr_32 }
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- { id: 20, class: vgpr_32 }
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- { id: 21, class: vgpr_32 }
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- { id: 22, class: vgpr_32 }
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- { id: 23, class: vreg_64 }
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- { id: 24, class: vgpr_32 }
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- { id: 25, class: vreg_64 }
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- { id: 26, class: vreg_64 }
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liveins:
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- { reg: '$sgpr0_sgpr1', virtual-reg: '%0' }
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- { reg: '$vgpr0', virtual-reg: '%3' }
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body: |
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bb.0:
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liveins: $sgpr0_sgpr1, $vgpr0
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%3 = COPY $vgpr0
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%0 = COPY $sgpr0_sgpr1
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%4 = S_LOAD_DWORDX2_IMM %0, 9, 0 :: (non-temporal dereferenceable invariant load (s64) from `i64 addrspace(4)* undef`)
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%5 = S_LOAD_DWORDX2_IMM %0, 11, 0 :: (non-temporal dereferenceable invariant load (s64) from `i64 addrspace(4)* undef`)
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%24 = V_ASHRREV_I32_e32 31, %3, implicit $exec
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%25 = REG_SEQUENCE %3, 1, %24, 2
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%10 = S_MOV_B32 61440
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%11 = S_MOV_B32 0
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%12 = REG_SEQUENCE killed %11, 1, killed %10, 2
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%13 = REG_SEQUENCE killed %5, 17, %12, 18
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%14 = S_MOV_B32 2
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%26 = V_LSHL_B64_e64 killed %25, 2, implicit $exec
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%16 = REG_SEQUENCE killed %4, 17, %12, 18
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%18 = COPY %26
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%17 = BUFFER_LOAD_DWORD_ADDR64 %26, killed %13, 0, 0, 0, 0, 0, implicit $exec
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%20 = V_ADD_F32_e64 0, killed %17, 0, 1065353216, 0, 0, implicit $mode, implicit $exec
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%21 = V_ADD_F32_e64 0, killed %20, 0, killed %20, 0, 3, implicit $mode, implicit $exec
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BUFFER_STORE_DWORD_ADDR64 killed %21, %26, killed %16, 0, 0, 0, 0, 0, implicit $exec
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S_ENDPGM 0
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...
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---
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# Don't fold a mul that looks like an omod if itself has clamp set
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# This might be OK, but would require folding the clamp at the same time.
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# GCN-LABEL: name: v_omod_add_clamp_already_set_f32
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# GCN: %20:vgpr_32 = V_ADD_F32_e64 0, killed %17, 0, 1065353216, 0, 0, implicit $mode, implicit $exec
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# GCN-NEXT: %21:vgpr_32 = V_ADD_F32_e64 0, killed %20, 0, killed %20, 1, 0, implicit $mode, implicit $exec
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name: v_omod_add_clamp_already_set_f32
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tracksRegLiveness: true
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registers:
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- { id: 0, class: sgpr_64 }
|
|
- { id: 1, class: sreg_32_xm0 }
|
|
- { id: 2, class: sgpr_32 }
|
|
- { id: 3, class: vgpr_32 }
|
|
- { id: 4, class: sreg_64_xexec }
|
|
- { id: 5, class: sreg_64_xexec }
|
|
- { id: 6, class: sreg_32 }
|
|
- { id: 7, class: sreg_32 }
|
|
- { id: 8, class: sreg_32_xm0 }
|
|
- { id: 9, class: sreg_64 }
|
|
- { id: 10, class: sreg_32_xm0 }
|
|
- { id: 11, class: sreg_32_xm0 }
|
|
- { id: 12, class: sgpr_64 }
|
|
- { id: 13, class: sgpr_128 }
|
|
- { id: 14, class: sreg_32_xm0 }
|
|
- { id: 15, class: sreg_64 }
|
|
- { id: 16, class: sgpr_128 }
|
|
- { id: 17, class: vgpr_32 }
|
|
- { id: 18, class: vreg_64 }
|
|
- { id: 19, class: vgpr_32 }
|
|
- { id: 20, class: vgpr_32 }
|
|
- { id: 21, class: vgpr_32 }
|
|
- { id: 22, class: vgpr_32 }
|
|
- { id: 23, class: vreg_64 }
|
|
- { id: 24, class: vgpr_32 }
|
|
- { id: 25, class: vreg_64 }
|
|
- { id: 26, class: vreg_64 }
|
|
liveins:
|
|
- { reg: '$sgpr0_sgpr1', virtual-reg: '%0' }
|
|
- { reg: '$vgpr0', virtual-reg: '%3' }
|
|
body: |
|
|
bb.0:
|
|
liveins: $sgpr0_sgpr1, $vgpr0
|
|
|
|
%3 = COPY $vgpr0
|
|
%0 = COPY $sgpr0_sgpr1
|
|
%4 = S_LOAD_DWORDX2_IMM %0, 9, 0 :: (non-temporal dereferenceable invariant load (s64) from `i64 addrspace(4)* undef`)
|
|
%5 = S_LOAD_DWORDX2_IMM %0, 11, 0 :: (non-temporal dereferenceable invariant load (s64) from `i64 addrspace(4)* undef`)
|
|
%24 = V_ASHRREV_I32_e32 31, %3, implicit $exec
|
|
%25 = REG_SEQUENCE %3, 1, %24, 2
|
|
%10 = S_MOV_B32 61440
|
|
%11 = S_MOV_B32 0
|
|
%12 = REG_SEQUENCE killed %11, 1, killed %10, 2
|
|
%13 = REG_SEQUENCE killed %5, 17, %12, 18
|
|
%14 = S_MOV_B32 2
|
|
%26 = V_LSHL_B64_e64 killed %25, 2, implicit $exec
|
|
%16 = REG_SEQUENCE killed %4, 17, %12, 18
|
|
%18 = COPY %26
|
|
%17 = BUFFER_LOAD_DWORD_ADDR64 %26, killed %13, 0, 0, 0, 0, 0, implicit $exec
|
|
%20 = V_ADD_F32_e64 0, killed %17, 0, 1065353216, 0, 0, implicit $mode, implicit $exec
|
|
%21 = V_ADD_F32_e64 0, killed %20, 0, killed %20, 1, 0, implicit $mode, implicit $exec
|
|
BUFFER_STORE_DWORD_ADDR64 killed %21, %26, killed %16, 0, 0, 0, 0, 0, implicit $exec
|
|
S_ENDPGM 0
|
|
|
|
...
|
|
---
|
|
|
|
# Pass used to crash with immediate second operand of max
|
|
name: v_max_reg_imm_f32
|
|
tracksRegLiveness: true
|
|
registers:
|
|
- { id: 0, class: vgpr_32 }
|
|
- { id: 1, class: vgpr_32 }
|
|
body: |
|
|
bb.0:
|
|
liveins: $vgpr0
|
|
|
|
%0 = COPY $vgpr0
|
|
%1 = V_MAX_F32_e64 0, killed %0, 0, 1056964608, 1, 0, implicit $mode, implicit $exec
|
|
|
|
...
|