1
0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-11-22 18:54:02 +01:00
llvm-mirror/test/CodeGen/AMDGPU/global-smrd-unknown.ll
Stanislav Mekhanoshin eda6209c9f [AMDGPU] Switch AnnotateUniformValues to MemorySSA
This shall speedup compilation and also remove threshold
limitations used by memory dependency analysis.

It also seem to fix the bug in the coalescer_remat.ll
where an SMRD load was used in presence of a potentially
clobbering store.

Fixes: SWDEV-272132

Differential Revision: https://reviews.llvm.org/D101962
2021-05-05 18:34:41 -07:00

21 lines
886 B
LLVM

; RUN: llc -mtriple=amdgcn--amdhsa -mcpu=fiji -memdep-block-scan-limit=1 -amdgpu-scalarize-global-loads -verify-machineinstrs < %s | FileCheck -enable-var-scope -check-prefix=GCN %s
; GCN-LABEL: {{^}}unknown_memdep_analysis:
; GCN: flat_load_dword
; GCN: flat_load_dword
; GCN: flat_store_dword
define void @unknown_memdep_analysis(float addrspace(1)* nocapture readonly %arg, float %arg1) #0 {
bb:
%tmp53 = load float, float addrspace(1)* undef, align 4
%tmp54 = getelementptr inbounds float, float addrspace(1)* %arg, i32 31
%tmp55 = load float, float addrspace(1)* %tmp54, align 4
%tmp56 = tail call float @llvm.fmuladd.f32(float %arg1, float %tmp53, float %tmp55)
store float %tmp56, float addrspace(1)* undef, align 4
ret void
}
declare float @llvm.fmuladd.f32(float, float, float) #1
attributes #0 = { nounwind }
attributes #1 = { nounwind readnone speculatable }