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llvm-mirror/test/CodeGen/AMDGPU/replace-lds-by-ptr-use-same-lds.ll
Jon Chesterfield 7f9c53b162 Disable ReplaceLDS pass, patch up tests to match
Most tests passed with an extra argument to explicitly enable the pass.
One does not, deleted it as part of this change. I can't see why the codegen
would be different between default on and default off but switched on. It
can be retrieved from the project history.

This would be a revert, but git revert was not clean. Disabling the pass
and leaving it in tree is less likely to cause breakage elsewhere than
patching up the git revert conflicts on unfamiliar code. It'll be landed
without review, as @hsmhsm is believed unavailable at present.

Differential Revision: https://reviews.llvm.org/D104962
2021-06-26 01:36:42 +01:00

54 lines
2.1 KiB
LLVM

; RUN: opt -S -mtriple=amdgcn-- -amdgpu-replace-lds-use-with-pointer -amdgpu-enable-lds-replace-with-pointer=true < %s | FileCheck %s
; DESCRIPTION:
;
; There is one lds global defined here, and this lds is used within a single non-kernel
; function multiple times, and this non-kernel function is reachable from kernel. Hence
; pointer takes place. But important note is - store-to/load-from pointer should happen
; only once irrespective of number of uses.
;
; Original LDS should exist.
; CHECK: @lds1 = internal addrspace(3) global [1 x i32] undef, align 4
@lds1 = internal addrspace(3) global [1 x i32] undef, align 4
; Pointers should be created.
; CHECK: @lds1.ptr = internal unnamed_addr addrspace(3) global i16 undef, align 2
; Pointer replacement code should be added.
define internal void @function() {
; CHECK-LABEL: entry:
; CHECK: %0 = load i16, i16 addrspace(3)* @lds1.ptr, align 2
; CHECK: %1 = getelementptr i8, i8 addrspace(3)* null, i16 %0
; CHECK: %2 = bitcast i8 addrspace(3)* %1 to [1 x i32] addrspace(3)*
; CHECK: %gep1 = getelementptr inbounds [1 x i32], [1 x i32] addrspace(3)* %2, i32 0, i32 0
; CHECK: %gep2 = getelementptr inbounds [1 x i32], [1 x i32] addrspace(3)* %2, i32 0, i32 0
; CHECK: %gep3 = getelementptr inbounds [1 x i32], [1 x i32] addrspace(3)* %2, i32 0, i32 0
; CHECK: ret void
entry:
%gep1 = getelementptr inbounds [1 x i32], [1 x i32] addrspace(3)* @lds1, i32 0, i32 0
%gep2 = getelementptr inbounds [1 x i32], [1 x i32] addrspace(3)* @lds1, i32 0, i32 0
%gep3 = getelementptr inbounds [1 x i32], [1 x i32] addrspace(3)* @lds1, i32 0, i32 0
ret void
}
; Pointer initialization code shoud be added;
define protected amdgpu_kernel void @kernel() {
; CHECK-LABEL: entry:
; CHECK: %0 = call i32 @llvm.amdgcn.mbcnt.lo(i32 -1, i32 0)
; CHECK: %1 = icmp eq i32 %0, 0
; CHECK: br i1 %1, label %2, label %3
;
; CHECK-LABEL: 2:
; CHECK: store i16 ptrtoint ([1 x i32] addrspace(3)* @lds1 to i16), i16 addrspace(3)* @lds1.ptr, align 2
; CHECK: br label %3
;
; CHECK-LABEL: 3:
; CHECK: call void @llvm.amdgcn.wave.barrier()
; CHECK: call void @function()
; CHECK: ret void
entry:
call void @function()
ret void
}