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4a7f8b5385
Differential Revision: https://reviews.llvm.org/D103323 Change-Id: I4ffaaa32301795ba8a339567a68e77fe0862b869
212 lines
7.8 KiB
LLVM
212 lines
7.8 KiB
LLVM
; RUN: llc -amdgpu-scalarize-global-loads=false -march=amdgcn -mcpu=verde -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
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; RUN: llc -amdgpu-scalarize-global-loads=false -march=amdgcn -mcpu=tonga -mattr=-flat-for-global -verify-machineinstrs -denormal-fp-math-f32=preserve-sign < %s | FileCheck -check-prefix=SI -check-prefix=FUNC -check-prefix=VI %s
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; RUN: llc -amdgpu-scalarize-global-loads=false -mtriple=amdgcn--amdhsa -mcpu=fiji -denormal-fp-math-f32=ieee < %s | FileCheck -check-prefix=GCN -check-prefix=VI %s
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; RUN: llc -amdgpu-scalarize-global-loads=false -mtriple=amdgcn--amdhsa -mcpu=gfx1030 -denormal-fp-math-f32=ieee < %s | FileCheck -check-prefix=GCN -check-prefix=GFX1030 %s
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; RUN: llc -amdgpu-scalarize-global-loads=false -march=r600 -mcpu=redwood < %s | FileCheck -check-prefix=EG -check-prefix=FUNC %s
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; FUNC-LABEL: {{^}}udiv_i32:
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; EG-NOT: SETGE_INT
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; EG: CF_END
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; SI: v_rcp_iflag_f32_e32
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define amdgpu_kernel void @udiv_i32(i32 addrspace(1)* %out, i32 addrspace(1)* %in) {
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%b_ptr = getelementptr i32, i32 addrspace(1)* %in, i32 1
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%a = load i32, i32 addrspace(1)* %in
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%b = load i32, i32 addrspace(1)* %b_ptr
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%result = udiv i32 %a, %b
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store i32 %result, i32 addrspace(1)* %out
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ret void
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}
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; FUNC-LABEL: {{^}}s_udiv_i32:
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; SI: v_rcp_iflag_f32_e32
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define amdgpu_kernel void @s_udiv_i32(i32 addrspace(1)* %out, i32 %a, i32 %b) {
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%result = udiv i32 %a, %b
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store i32 %result, i32 addrspace(1)* %out
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ret void
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}
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; The code generated by udiv is long and complex and may frequently
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; change. The goal of this test is to make sure the ISel doesn't fail
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; when it gets a v4i32 udiv
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; FUNC-LABEL: {{^}}udiv_v2i32:
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; EG: CF_END
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; SI: v_rcp_iflag_f32_e32
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; SI: v_rcp_iflag_f32_e32
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; SI: s_endpgm
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define amdgpu_kernel void @udiv_v2i32(<2 x i32> addrspace(1)* %out, <2 x i32> addrspace(1)* %in) {
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%b_ptr = getelementptr <2 x i32>, <2 x i32> addrspace(1)* %in, i32 1
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%a = load <2 x i32>, <2 x i32> addrspace(1) * %in
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%b = load <2 x i32>, <2 x i32> addrspace(1) * %b_ptr
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%result = udiv <2 x i32> %a, %b
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store <2 x i32> %result, <2 x i32> addrspace(1)* %out
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ret void
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}
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; FUNC-LABEL: {{^}}udiv_v4i32:
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; EG: CF_END
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; SI: s_endpgm
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define amdgpu_kernel void @udiv_v4i32(<4 x i32> addrspace(1)* %out, <4 x i32> addrspace(1)* %in) {
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%b_ptr = getelementptr <4 x i32>, <4 x i32> addrspace(1)* %in, i32 1
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%a = load <4 x i32>, <4 x i32> addrspace(1) * %in
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%b = load <4 x i32>, <4 x i32> addrspace(1) * %b_ptr
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%result = udiv <4 x i32> %a, %b
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store <4 x i32> %result, <4 x i32> addrspace(1)* %out
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ret void
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}
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; FUNC-LABEL: {{^}}udiv_i32_div_pow2:
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; SI: buffer_load_dword [[VAL:v[0-9]+]]
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; SI: v_lshrrev_b32_e32 [[RESULT:v[0-9]+]], 4, [[VAL]]
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; SI: buffer_store_dword [[RESULT]]
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define amdgpu_kernel void @udiv_i32_div_pow2(i32 addrspace(1)* %out, i32 addrspace(1)* %in) {
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%b_ptr = getelementptr i32, i32 addrspace(1)* %in, i32 1
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%a = load i32, i32 addrspace(1)* %in
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%result = udiv i32 %a, 16
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store i32 %result, i32 addrspace(1)* %out
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ret void
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}
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; FUNC-LABEL: {{^}}udiv_i32_div_k_even:
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; SI-DAG: buffer_load_dword [[VAL:v[0-9]+]]
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; SI-DAG: s_mov_b32 [[K:s[0-9]+]], 0xfabbd9c1
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; SI: v_mul_hi_u32 [[MULHI:v[0-9]+]], [[VAL]], [[K]]
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; SI: v_lshrrev_b32_e32 [[RESULT:v[0-9]+]], 25, [[MULHI]]
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; SI: buffer_store_dword [[RESULT]]
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define amdgpu_kernel void @udiv_i32_div_k_even(i32 addrspace(1)* %out, i32 addrspace(1)* %in) {
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%b_ptr = getelementptr i32, i32 addrspace(1)* %in, i32 1
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%a = load i32, i32 addrspace(1)* %in
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%result = udiv i32 %a, 34259182
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store i32 %result, i32 addrspace(1)* %out
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ret void
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}
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; FUNC-LABEL: {{^}}udiv_i32_div_k_odd:
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; SI-DAG: buffer_load_dword [[VAL:v[0-9]+]]
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; SI-DAG: s_mov_b32 [[K:s[0-9]+]], 0x7d5deca3
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; SI: v_mul_hi_u32 [[MULHI:v[0-9]+]], [[VAL]], [[K]]
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; SI: v_lshrrev_b32_e32 [[RESULT:v[0-9]+]], 24, [[MULHI]]
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; SI: buffer_store_dword [[RESULT]]
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define amdgpu_kernel void @udiv_i32_div_k_odd(i32 addrspace(1)* %out, i32 addrspace(1)* %in) {
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%b_ptr = getelementptr i32, i32 addrspace(1)* %in, i32 1
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%a = load i32, i32 addrspace(1)* %in
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%result = udiv i32 %a, 34259183
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store i32 %result, i32 addrspace(1)* %out
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ret void
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}
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; FUNC-LABEL: {{^}}v_udiv_i8:
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; SI: v_rcp_iflag_f32
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; SI: v_and_b32_e32 [[TRUNC:v[0-9]+]], 0xff, v{{[0-9]+}}
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; SI: buffer_store_dword [[TRUNC]]
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define amdgpu_kernel void @v_udiv_i8(i32 addrspace(1)* %out, i8 addrspace(1)* %in) {
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%den_ptr = getelementptr i8, i8 addrspace(1)* %in, i8 1
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%num = load i8, i8 addrspace(1) * %in
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%den = load i8, i8 addrspace(1) * %den_ptr
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%result = udiv i8 %num, %den
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%result.ext = zext i8 %result to i32
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store i32 %result.ext, i32 addrspace(1)* %out
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ret void
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}
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; FUNC-LABEL: {{^}}v_udiv_i16:
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; SI: v_rcp_iflag_f32
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; SI: v_and_b32_e32 [[TRUNC:v[0-9]+]], 0xffff, v{{[0-9]+}}
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; SI: buffer_store_dword [[TRUNC]]
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define amdgpu_kernel void @v_udiv_i16(i32 addrspace(1)* %out, i16 addrspace(1)* %in) {
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%den_ptr = getelementptr i16, i16 addrspace(1)* %in, i16 1
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%num = load i16, i16 addrspace(1) * %in
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%den = load i16, i16 addrspace(1) * %den_ptr
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%result = udiv i16 %num, %den
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%result.ext = zext i16 %result to i32
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store i32 %result.ext, i32 addrspace(1)* %out
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ret void
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}
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; FUNC-LABEL: {{^}}v_udiv_i23:
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; SI: v_rcp_iflag_f32
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; SI: v_and_b32_e32 [[TRUNC:v[0-9]+]], 0x7fffff, v{{[0-9]+}}
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; SI: buffer_store_dword [[TRUNC]]
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define amdgpu_kernel void @v_udiv_i23(i32 addrspace(1)* %out, i23 addrspace(1)* %in) {
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%den_ptr = getelementptr i23, i23 addrspace(1)* %in, i23 1
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%num = load i23, i23 addrspace(1) * %in
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%den = load i23, i23 addrspace(1) * %den_ptr
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%result = udiv i23 %num, %den
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%result.ext = zext i23 %result to i32
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store i32 %result.ext, i32 addrspace(1)* %out
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ret void
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}
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; FUNC-LABEL: {{^}}v_udiv_i24:
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; SI-NOT: v_rcp_f32
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define amdgpu_kernel void @v_udiv_i24(i32 addrspace(1)* %out, i24 addrspace(1)* %in) {
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%den_ptr = getelementptr i24, i24 addrspace(1)* %in, i24 1
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%num = load i24, i24 addrspace(1) * %in
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%den = load i24, i24 addrspace(1) * %den_ptr
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%result = udiv i24 %num, %den
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%result.ext = zext i24 %result to i32
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store i32 %result.ext, i32 addrspace(1)* %out
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ret void
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}
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; FUNC-LABEL: @scalarize_mulhu_4xi32
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; SI: v_mul_hi_u32
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; SI: v_mul_hi_u32
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; SI: v_mul_hi_u32
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; SI: v_mul_hi_u32
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define amdgpu_kernel void @scalarize_mulhu_4xi32(<4 x i32> addrspace(1)* nocapture readonly %in, <4 x i32> addrspace(1)* nocapture %out) {
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%1 = load <4 x i32>, <4 x i32> addrspace(1)* %in, align 16
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%2 = udiv <4 x i32> %1, <i32 53668, i32 53668, i32 53668, i32 53668>
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store <4 x i32> %2, <4 x i32> addrspace(1)* %out, align 16
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ret void
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}
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; FUNC-LABEL: {{^}}test_udiv2:
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; SI: s_lshr_b32 s{{[0-9]}}, s{{[0-9]}}, 1
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define amdgpu_kernel void @test_udiv2(i32 %p) {
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%i = udiv i32 %p, 2
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store volatile i32 %i, i32 addrspace(1)* undef
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ret void
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}
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; FUNC-LABEL: {{^}}test_udiv_3_mulhu:
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; SI: v_mov_b32_e32 v{{[0-9]+}}, 0xaaaaaaab
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; SI: v_mul_hi_u32 v0, {{s[0-9]+}}, {{v[0-9]+}}
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; SI-NEXT: v_lshrrev_b32_e32 v0, 1, v0
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define amdgpu_kernel void @test_udiv_3_mulhu(i32 %p) {
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%i = udiv i32 %p, 3
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store volatile i32 %i, i32 addrspace(1)* undef
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ret void
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}
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; GCN-LABEL: {{^}}fdiv_test_denormals
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; VI: v_mad_f32 v{{[0-9]+}}, -v{{[0-9]+}}, v{{[0-9]+}}, v{{[0-9]+}}
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; GFX1030: v_fmac_f32_e64 v{{[0-9]+}}, -v{{[0-9]+}}, v{{[0-9]+}}
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define amdgpu_kernel void @fdiv_test_denormals(i8 addrspace(1)* nocapture readonly %arg) {
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bb:
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%tmp = load i8, i8 addrspace(1)* null, align 1
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%tmp1 = sext i8 %tmp to i32
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%tmp2 = getelementptr inbounds i8, i8 addrspace(1)* %arg, i64 undef
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%tmp3 = load i8, i8 addrspace(1)* %tmp2, align 1
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%tmp4 = sext i8 %tmp3 to i32
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%tmp5 = sdiv i32 %tmp1, %tmp4
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%tmp6 = trunc i32 %tmp5 to i8
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store i8 %tmp6, i8 addrspace(1)* null, align 1
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ret void
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}
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define i64 @v_test_udiv64_mulhi_fold(i64 %arg) {
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; GCN-LABEL: v_test_udiv64_mulhi_fold
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; GFX1030: s_add_u32 [[VAL:s[0-9]+]], 0x4237, s{{[0-9]+}}
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; GFX1030-NOT: s_mul_hi_u32
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; GFX1030: v_add_co_u32 v{{[0-9]+}}, [[VAL]], 0xa9000000, [[VAL]]
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%d = udiv i64 %arg, 100000
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ret i64 %d
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}
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