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a328f25e7f
Also add more processors to make -mcpu option behave similar to gcc. Differential Revision: https://reviews.llvm.org/D33335 llvm-svn: 303695
45 lines
847 B
LLVM
45 lines
847 B
LLVM
; RUN: llc -O0 -mhwmult=32bit < %s | FileCheck %s
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; RUN: llc -O0 -mattr=+hwmult32 < %s | FileCheck %s
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target datalayout = "e-p:16:16:16-i8:8:8-i16:16:16-i32:16:32-n8:16-a0:16:16"
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target triple = "msp430---elf"
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@g_i32 = global i32 123, align 8
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@g_i64 = global i64 456, align 8
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@g_i16 = global i16 789, align 8
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define i16 @mpyi() #0 {
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entry:
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; CHECK: mpyi:
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; CHECK: call #__mspabi_mpyi_hw
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%0 = load volatile i16, i16* @g_i16, align 8
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%1 = mul i16 %0, %0
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ret i16 %1
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}
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define i32 @mpyli() #0 {
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entry:
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; CHECK: mpyli:
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; CHECK: call #__mspabi_mpyl_hw32
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%0 = load volatile i32, i32* @g_i32, align 8
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%1 = mul i32 %0, %0
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ret i32 %1
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}
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define i64 @mpylli() #0 {
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entry:
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; CHECK: mpylli:
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; CHECK: call #__mspabi_mpyll_hw32
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%0 = load volatile i64, i64* @g_i64, align 8
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%1 = mul i64 %0, %0
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ret i64 %1
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}
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attributes #0 = { nounwind }
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