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llvm-mirror/test/CodeGen/PowerPC/scavenging.mir
Matt Arsenault cc12b285b6 CodeGen: Print/parse LLTs in MachineMemOperands
This will currently accept the old number of bytes syntax, and convert
it to a scalar. This should be removed in the near future (I think I
converted all of the tests already, but likely missed a few).

Not sure what the exact syntax and policy should be. We can continue
printing the number of bytes for non-generic instructions to avoid
test churn and only allow non-scalar types for generic instructions.

This will currently print the LLT in parentheses, but accept parsing
the existing integers and implicitly converting to scalar. The
parentheses are a bit ugly, but the parser logic seems unable to deal
without either parentheses or some keyword to indicate the start of a
type.
2021-06-30 16:54:13 -04:00

207 lines
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# RUN: llc -mtriple=ppc64-- -run-pass scavenger-test -verify-machineinstrs -o - %s | FileCheck %s
---
# CHECK-LABEL: name: noscav0
name: noscav0
tracksRegLiveness: true
body: |
bb.0:
; CHECK: [[REG0:\$r[0-9]+]] = LI 42
; CHECK-NEXT: NOP implicit killed [[REG0]]
%0 : gprc = LI 42
NOP implicit %0
; CHECK: [[REG1:\$r[0-9]+]] = LI 42
; CHECK-NEXT: NOP
; CHECK-NEXT: NOP implicit [[REG1]]
; CHECK-NEXT: NOP
; CHECK-NEXT: NOP implicit killed [[REG1]]
%1 : gprc = LI 42
NOP
NOP implicit %1
NOP
NOP implicit %1
; CHECK: [[REG2:\$r[0-9]+]] = LI 42
; CHECK-NEXT: NOP implicit [[REG2]]
%2 : gprc = LI 42
NOP implicit %2
$x0 = IMPLICIT_DEF
$x1 = IMPLICIT_DEF
$x2 = IMPLICIT_DEF
$x3 = IMPLICIT_DEF
$x4 = IMPLICIT_DEF
$x27 = IMPLICIT_DEF
$x28 = IMPLICIT_DEF
$x29 = IMPLICIT_DEF
$x30 = IMPLICIT_DEF
; CHECK-NOT: $x0 = LI 42
; CHECK-NOT: $x1 = LI 42
; CHECK-NOT: $x2 = LI 42
; CHECK-NOT: $x3 = LI 42
; CHECK-NOT: $x4 = LI 42
; CHECK-NOT: $x5 = LI 42
; CHECK-NOT: $x27 = LI 42
; CHECK-NOT: $x28 = LI 42
; CHECK-NOT: $x29 = LI 42
; CHECK-NOT: $x30 = LI 42
; CHECK: [[REG3:\$r[0-9]+]] = LI 42
; CHECK-NEXT: $x5 = IMPLICIT_DEF
; CHECK-NEXT: NOP implicit killed [[REG2]]
; CHECK-NEXT: NOP implicit killed [[REG3]]
%3 : gprc = LI 42
$x5 = IMPLICIT_DEF
NOP implicit %2
NOP implicit %3
NOP implicit $x0
NOP implicit $x1
NOP implicit $x2
NOP implicit $x3
NOP implicit $x4
NOP implicit $x5
NOP implicit $x27
NOP implicit $x28
NOP implicit $x29
NOP implicit $x30
...
---
# CHECK-LABEL: name: scav0
name: scav0
tracksRegLiveness: true
stack:
# variable-sized object should be a reason to reserve an emergency spillslot
# in the RegScavenger
- { id: 0, type: variable-sized, offset: -32, alignment: 1 }
body: |
bb.0:
$x0 = IMPLICIT_DEF
$x1 = IMPLICIT_DEF
$x2 = IMPLICIT_DEF
$x3 = IMPLICIT_DEF
$x4 = IMPLICIT_DEF
$x5 = IMPLICIT_DEF
$x6 = IMPLICIT_DEF
$x7 = IMPLICIT_DEF
$x8 = IMPLICIT_DEF
$x9 = IMPLICIT_DEF
$x10 = IMPLICIT_DEF
$x11 = IMPLICIT_DEF
$x12 = IMPLICIT_DEF
$x13 = IMPLICIT_DEF
$x14 = IMPLICIT_DEF
$x15 = IMPLICIT_DEF
$x16 = IMPLICIT_DEF
$x17 = IMPLICIT_DEF
$x18 = IMPLICIT_DEF
$x19 = IMPLICIT_DEF
$x20 = IMPLICIT_DEF
$x21 = IMPLICIT_DEF
$x22 = IMPLICIT_DEF
$x23 = IMPLICIT_DEF
$x24 = IMPLICIT_DEF
$x25 = IMPLICIT_DEF
$x26 = IMPLICIT_DEF
$x27 = IMPLICIT_DEF
$x28 = IMPLICIT_DEF
$x29 = IMPLICIT_DEF
$x30 = IMPLICIT_DEF
; CHECK: STD killed [[SPILLEDREG:\$x[0-9]+]]
; CHECK: [[SPILLEDREG]] = LI8 42
; CHECK: NOP implicit killed [[SPILLEDREG]]
; CHECK: [[SPILLEDREG]] = LD
%0 : g8rc = LI8 42
NOP implicit %0
NOP implicit $x0
NOP implicit $x1
NOP implicit $x2
NOP implicit $x3
NOP implicit $x4
NOP implicit $x5
NOP implicit $x6
NOP implicit $x7
NOP implicit $x8
NOP implicit $x9
NOP implicit $x10
NOP implicit $x11
NOP implicit $x12
NOP implicit $x13
NOP implicit $x14
NOP implicit $x15
NOP implicit $x16
NOP implicit $x17
NOP implicit $x18
NOP implicit $x19
NOP implicit $x20
NOP implicit $x21
NOP implicit $x22
NOP implicit $x23
NOP implicit $x24
NOP implicit $x25
NOP implicit $x26
NOP implicit $x27
NOP implicit $x28
NOP implicit $x29
NOP implicit $x30
...
---
# Check for bug where we would refuse to spill before the first instruction in a
# block.
# CHECK-LABEL: name: spill_at_begin
# CHECK: bb.0:
# CHECK: liveins:
# CHECK: STD killed [[REG:\$x[0-9]+]]{{.*}}(store (s64) into %stack.{{[0-9]+}})
# CHECK: [[REG]] = LIS8 0
# CHECK: [[REG]] = ORI8 killed [[REG]], 48
# CHECK: NOP implicit killed [[REG]]
# CHECK: [[REG]] = LD{{.*}}(load (s64) from %stack.{{[0-9]+}})
name: spill_at_begin
tracksRegLiveness: true
stack:
# variable-sized object should be a reason to reserve an emergency spillslot
# in the RegScavenger
- { id: 0, type: variable-sized, offset: -32, alignment: 1 }
body: |
bb.0:
liveins: $x0, $x1, $x2, $x3, $x4, $x5, $x6, $x7, $x8, $x9, $x10, $x11, $x12, $x13, $x14, $x15, $x16, $x17, $x18, $x19, $x20, $x21, $x22, $x23, $x24, $x25, $x26, $x27, $x28, $x29, $x30, $x31
%0 : g8rc = LIS8 0
%1 : g8rc = ORI8 %0, 48
NOP implicit %1
NOP implicit $x0
NOP implicit $x1
NOP implicit $x2
NOP implicit $x3
NOP implicit $x4
NOP implicit $x5
NOP implicit $x6
NOP implicit $x7
NOP implicit $x8
NOP implicit $x9
NOP implicit $x10
NOP implicit $x11
NOP implicit $x12
NOP implicit $x13
NOP implicit $x14
NOP implicit $x15
NOP implicit $x16
NOP implicit $x17
NOP implicit $x18
NOP implicit $x19
NOP implicit $x20
NOP implicit $x21
NOP implicit $x22
NOP implicit $x23
NOP implicit $x24
NOP implicit $x25
NOP implicit $x26
NOP implicit $x27
NOP implicit $x28
NOP implicit $x29
NOP implicit $x30
NOP implicit $x31
...