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c97e9a2df5
We already have these patterns for AVX512VNNI.
69 lines
2.8 KiB
LLVM
69 lines
2.8 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -disable-peephole -mtriple=x86_64-unknown-unknown -mattr=+avx512vnni,+avx512vl,+avx512bw | FileCheck %s --check-prefixes=CHECK
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define <16 x i32> @test_pmaddwd_v32i16_add_v16i32(<16 x i32> %a0, <32 x i16> %a1, <32 x i16> %a2) {
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; CHECK-LABEL: test_pmaddwd_v32i16_add_v16i32:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vpdpwssd %zmm2, %zmm1, %zmm0
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; CHECK-NEXT: retq
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%1 = call <16 x i32> @llvm.x86.avx512.pmaddw.d.512(<32 x i16> %a1, <32 x i16> %a2)
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%2 = add <16 x i32> %1, %a0
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ret <16 x i32> %2
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}
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define <16 x i32> @test_pmaddwd_v32i16_add_v16i32_commute(<16 x i32> %a0, <32 x i16> %a1, <32 x i16> %a2) {
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; CHECK-LABEL: test_pmaddwd_v32i16_add_v16i32_commute:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vpdpwssd %zmm2, %zmm1, %zmm0
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; CHECK-NEXT: retq
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%1 = call <16 x i32> @llvm.x86.avx512.pmaddw.d.512(<32 x i16> %a1, <32 x i16> %a2)
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%2 = add <16 x i32> %a0, %1
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ret <16 x i32> %2
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}
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define <16 x i32> @test_pmaddwd_v32i16_add_v16i32_load1(<16 x i32> %a0, <32 x i16>* %p1, <32 x i16> %a2) {
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; CHECK-LABEL: test_pmaddwd_v32i16_add_v16i32_load1:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vpdpwssd (%rdi), %zmm1, %zmm0
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; CHECK-NEXT: retq
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%a1 = load <32 x i16>, <32 x i16>* %p1
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%1 = call <16 x i32> @llvm.x86.avx512.pmaddw.d.512(<32 x i16> %a1, <32 x i16> %a2)
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%2 = add <16 x i32> %1, %a0
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ret <16 x i32> %2
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}
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define <16 x i32> @test_pmaddwd_v32i16_add_v16i32_load2(<16 x i32> %a0, <32 x i16> %a1, <32 x i16>* %p2) {
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; CHECK-LABEL: test_pmaddwd_v32i16_add_v16i32_load2:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vpdpwssd (%rdi), %zmm1, %zmm0
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; CHECK-NEXT: retq
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%a2 = load <32 x i16>, <32 x i16>* %p2
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%1 = call <16 x i32> @llvm.x86.avx512.pmaddw.d.512(<32 x i16> %a1, <32 x i16> %a2)
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%2 = add <16 x i32> %1, %a0
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ret <16 x i32> %2
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}
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define <16 x i32> @test_pmaddwd_v32i16_add_v16i32_commute_load1(<16 x i32> %a0, <32 x i16>* %p1, <32 x i16> %a2) {
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; CHECK-LABEL: test_pmaddwd_v32i16_add_v16i32_commute_load1:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vpdpwssd (%rdi), %zmm1, %zmm0
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; CHECK-NEXT: retq
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%a1 = load <32 x i16>, <32 x i16>* %p1
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%1 = call <16 x i32> @llvm.x86.avx512.pmaddw.d.512(<32 x i16> %a1, <32 x i16> %a2)
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%2 = add <16 x i32> %a0, %1
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ret <16 x i32> %2
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}
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define <16 x i32> @test_pmaddwd_v32i16_add_v16i32_commute_load2(<16 x i32> %a0, <32 x i16> %a1, <32 x i16>* %p2) {
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; CHECK-LABEL: test_pmaddwd_v32i16_add_v16i32_commute_load2:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vpdpwssd (%rdi), %zmm1, %zmm0
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; CHECK-NEXT: retq
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%a2 = load <32 x i16>, <32 x i16>* %p2
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%1 = call <16 x i32> @llvm.x86.avx512.pmaddw.d.512(<32 x i16> %a1, <32 x i16> %a2)
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%2 = add <16 x i32> %a0, %1
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ret <16 x i32> %2
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}
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declare <16 x i32> @llvm.x86.avx512.pmaddw.d.512(<32 x i16>, <32 x i16>)
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